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[192.237.175.120]) by mx.google.com with ESMTPS id a1si2394779itf.141.2018.01.16.06.26.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 Jan 2018 06:26:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=kzN+KlZc; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ebS9R-0002Ai-Lg; Tue, 16 Jan 2018 14:23:45 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ebS9Q-0002AT-FJ for xen-devel@lists.xen.org; Tue, 16 Jan 2018 14:23:44 +0000 X-Inumbo-ID: a56e7d7f-fac8-11e7-b4a6-bc764e045a96 Received: from mail-wr0-x243.google.com (unknown [2a00:1450:400c:c0c::243]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id a56e7d7f-fac8-11e7-b4a6-bc764e045a96; Tue, 16 Jan 2018 15:22:14 +0100 (CET) Received: by mail-wr0-x243.google.com with SMTP id e41so15020080wre.9 for ; Tue, 16 Jan 2018 06:23:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JNMJr7RATyQdr5qU1Sn2hNxlI8qztQWJpAZ36w1NOls=; b=kzN+KlZcfTmZRs7nUM53CH4M0aaX7JS8hp/81ZYSZu1WZroFdS70ubcFLoLRy/NKgg SWZsapcIjN0crzN1u8LvuGRsu7b+3kRoVeqPd6eg5u9XU+UoNZ5RT9MScPryNccgIgk6 f3Xu2EKp8CpWiDG4PxIWgHP8O+G8mtvcaY6ec= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JNMJr7RATyQdr5qU1Sn2hNxlI8qztQWJpAZ36w1NOls=; b=JZqQPmHB3LxQJMUuAJoyDgXpALioKhouX88CxBY7W6aIpdIbU/lbiJjDrG3bsVNKTk 03IRts9ypGsDIJFZ6zdAhpvZ9M28VQ5HcY3Ej1PTFhNmORdq0uu8ha0tFUJmyoII7KWg 1hrQPox39MRI09lAO0tirUsdoS7RaKaz+J/hZrjpV3iV4txoXz+hSzqxPEE4bwCP5QY6 RANoFVedd4Ee0QlEbKUPvv+KAtmCG8Db3u6On57wvrd1+FnQDLSN4U4jhtEJgfyFPdP2 uiD8klqyVofiCyn4f43xdG2wjQzZeu+CQnuZAWOI180f/3j9gjpzFZ5i5M2XxE6r4aig 5rvg== X-Gm-Message-State: AKGB3mLMjrHiq1JpY9l2inmQ3NtQN+TrUcPV9Y2W6u9eqXprv/F98Ojm E8cItAId9HfjqoAiRRQ+woCNdWjW6kE= X-Received: by 10.223.151.20 with SMTP id r20mr24952070wrb.24.1516112622191; Tue, 16 Jan 2018 06:23:42 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id m201sm1686886wma.13.2018.01.16.06.23.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 Jan 2018 06:23:41 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 16 Jan 2018 14:23:33 +0000 Message-Id: <20180116142337.24942-2-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180116142337.24942-1-julien.grall@linaro.org> References: <20180116142337.24942-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, Julien Grall , andre.przywara@linaro.org Subject: [Xen-devel] [PATCH 1/5] xen/arm: Introduce enable callback to enable a capabilities on each online CPU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Once Xen knows what features/workarounds present on the platform, it might be necessary to configure each online CPU. Introduce a new callback "enable" that will be called on each online CPU to configure the "capability". The code is based on Linux v4.14 (where cpufeature.c comes from), the explanation of why using stop_machine_run is kept as we have similar problem in the future. Lastly introduce enable_errata_workaround that will be called once CPUs have booted and before the hardware domain is created. This is part of XSA-254. Signed-of-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/cpuerrata.c | 6 ++++++ xen/arch/arm/cpufeature.c | 29 +++++++++++++++++++++++++++++ xen/arch/arm/setup.c | 1 + xen/include/asm-arm/cpuerrata.h | 1 + xen/include/asm-arm/cpufeature.h | 3 +++ 5 files changed, 40 insertions(+) diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index fe9e9facbe..772587c05a 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -64,6 +64,12 @@ void check_local_cpu_errata(void) { update_cpu_capabilities(arm_errata, "enabled workaround for"); } + +void __init enable_errata_workarounds(void) +{ + enable_cpu_capabilities(arm_errata); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/cpufeature.c b/xen/arch/arm/cpufeature.c index 479c9fb011..525b45e22f 100644 --- a/xen/arch/arm/cpufeature.c +++ b/xen/arch/arm/cpufeature.c @@ -19,6 +19,7 @@ #include #include #include +#include #include DECLARE_BITMAP(cpu_hwcaps, ARM_NCAPS); @@ -40,6 +41,34 @@ void update_cpu_capabilities(const struct arm_cpu_capabilities *caps, } /* + * Run through the enabled capabilities and enable() it on all active + * CPUs. + */ +void __init enable_cpu_capabilities(const struct arm_cpu_capabilities *caps) +{ + for ( ; caps->matches; caps++ ) + { + if ( !cpus_have_cap(caps->capability) ) + continue; + + if ( caps->enable ) + { + int ret; + + /* + * Use stop_machine_run() as it schedules the work allowing + * us to modify PSTATE, instead of on_each_cpu() which uses + * an IPI, giving us a PSTATE that disappears when we + * return. + */ + ret = stop_machine_run(caps->enable, (void *)caps, NR_CPUS); + /* stop_machine_run should never fail at this stage of the boot. */ + BUG_ON(ret); + } + } +} + +/* * Local variables: * mode: C * c-file-style: "BSD" diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 16a3b1be8e..032a6a882d 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -849,6 +849,7 @@ void __init start_xen(unsigned long boot_phys_offset, * stop_machine (tasklets initialized via an initcall). */ apply_alternatives_all(); + enable_errata_workarounds(); /* Create initial domain 0. */ /* The vGIC for DOM0 is exactly emulating the hardware GIC */ diff --git a/xen/include/asm-arm/cpuerrata.h b/xen/include/asm-arm/cpuerrata.h index 8b158429c7..7de68361ff 100644 --- a/xen/include/asm-arm/cpuerrata.h +++ b/xen/include/asm-arm/cpuerrata.h @@ -5,6 +5,7 @@ #include void check_local_cpu_errata(void); +void enable_errata_workarounds(void); #ifdef CONFIG_HAS_ALTERNATIVE diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index f00b6dbd39..21c65e198c 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -74,6 +74,7 @@ struct arm_cpu_capabilities { const char *desc; u16 capability; bool (*matches)(const struct arm_cpu_capabilities *); + int (*enable)(void *); /* Called on every active CPUs */ union { struct { /* To be used for eratum handling only */ u32 midr_model; @@ -85,6 +86,8 @@ struct arm_cpu_capabilities { void update_cpu_capabilities(const struct arm_cpu_capabilities *caps, const char *info); +void enable_cpu_capabilities(const struct arm_cpu_capabilities *caps); + #endif /* __ASSEMBLY__ */ #endif