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[192.237.175.120]) by mx.google.com with ESMTPS id x1si2728918itd.33.2017.09.12.03.05.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Sep 2017 03:05:50 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dri2r-0002vz-6i; Tue, 12 Sep 2017 10:03:53 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dri2p-0002tv-Hy for xen-devel@lists.xen.org; Tue, 12 Sep 2017 10:03:51 +0000 Received: from [85.158.137.68] by server-3.bemta-3.messagelabs.com id 67/1D-02046-601B7B95; Tue, 12 Sep 2017 10:03:50 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRWlGSWpSXmKPExsVysyfVTZdt4/Z Ig52HxCyWfFzM4sDocXT3b6YAxijWzLyk/IoE1ozn746yFlzgq2hYt4yxgbGBu4uRi0NIYDOj xJPfa9kgnNOMEm8nv2PqYuTkYBPQlLjz+ROYLSIgLXHt82VGEJtZIFLi8Icf7CC2sICNROepb 0A1HBwsAqoSj79wgoR5BSwkJjWfBiuREJCX2NV2kRXE5hSwlFjx8RcbiC0EVPP95Q/GCYzcCx gZVjFqFKcWlaUW6RqZ6SUVZaZnlOQmZuboGhoY6+WmFhcnpqfmJCYV6yXn525iBPq3noGBcQd jw16/Q4ySHExKorxH1m+PFOJLyk+pzEgszogvKs1JLT7EKMPBoSTBy74BKCdYlJqeWpGWmQMM NJi0BAePkgjvbJBW3uKCxNzizHSI1ClGXY6Om3f/MAmx5OXnpUqJ874BKRIAKcoozYMbAQv6S 4yyUsK8jAwMDEI8BalFuZklqPKvGMU5GJWEeeNBpvBk5pXAbXoFdAQT0BE8l7aAHFGSiJCSam B0m6csfXjJpVNPK3gmx/acyj/Y+rih/21AsXMDw/bY+uqN11q3brnKeodZJ/qJd+YXt5S7s7y 9vh3mdGp7NKP9eplUuuzK6swzlvd7r+RdtQ9MM3qffc19SsO+noffn97Mlfn/ys1XeoaPhte8 67Vq62tX3WxedXzl6zixpf/aa9jKjzHqfT6hxFKckWioxVxUnAgA7ddJYnUCAAA= X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-3.tower-31.messagelabs.com!1505210629!114366363!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 54504 invoked from network); 12 Sep 2017 10:03:50 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-3.tower-31.messagelabs.com with SMTP; 12 Sep 2017 10:03:50 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9628815BF; Tue, 12 Sep 2017 03:03:49 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.206.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A7F723F578; Tue, 12 Sep 2017 03:03:48 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 12 Sep 2017 11:03:14 +0100 Message-Id: <20170912100330.2168-9-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170912100330.2168-1-julien.grall@arm.com> References: <20170912100330.2168-1-julien.grall@arm.com> Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org Subject: [Xen-devel] [PATCH v2 08/24] xen/arm: Add FnV field in hsr_*abt X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" FnV (FAR not Valid) bit was introduced by ARMv8 in both AArch32 and AArch64 (See D7-2275, D7-2277, G6-4958, G6-4962 in ARM DDI 0487B.a). Note the new revision of ARMv8 defined more bits in HSR. They haven't been added at the moment because we have no use of them in Xen. Signed-off-by: Julien Grall Reviewed-by: Andre Przywara Acked-by: Stefano Stabellini --- Changes in v2: - Expand the commit message to explain why the other bits have not been added. - Add Andre's reviewed-by --- xen/include/asm-arm/processor.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index bea4a56190..b6432b6bf4 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -587,7 +587,8 @@ union hsr { unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */ unsigned long res1:1; /* RES0 */ unsigned long eat:1; /* External abort type */ - unsigned long res2:15; + unsigned long fnv:1; /* FAR not Valid */ + unsigned long res2:14; unsigned long len:1; /* Instruction length */ unsigned long ec:6; /* Exception Class */ } iabt; /* HSR_EC_INSTR_ABORT_* */ @@ -598,10 +599,11 @@ union hsr { unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */ unsigned long cache:1; /* Cache Maintenance */ unsigned long eat:1; /* External Abort Type */ + unsigned long fnv:1; /* FAR not Valid */ #ifdef CONFIG_ARM_32 - unsigned long sbzp0:6; + unsigned long sbzp0:5; #else - unsigned long sbzp0:4; + unsigned long sbzp0:3; unsigned long ar:1; /* Acquire Release */ unsigned long sf:1; /* Sixty Four bit register */ #endif