From patchwork Tue Sep 12 10:03:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 112282 Delivered-To: patch@linaro.org Received: by 10.80.202.13 with SMTP id d13csp5674642edi; Tue, 12 Sep 2017 03:05:54 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAQ6VhsJQCpaa+4c7JlA5cWtfItf0R8Ei4bFWFwB7frVzIoRwCfAthDo891uHNVDnBSaaXx X-Received: by 10.107.202.133 with SMTP id a127mr18933816iog.22.1505210754785; Tue, 12 Sep 2017 03:05:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505210754; cv=none; d=google.com; s=arc-20160816; b=XLVL5yJjZMhJwrUHali4OVBPTBeEK2EtmOUQU9rhWUXZvDyjISKQiwWPDHFAUzI/wl zLEzTxP1SAmqDF2d03P3T68ZLhLoZ6TslKNNP3Xq1lE2bL8uyE8cCJ3jV7gZ67bAARxE hjRF6Kb3AdIUMH0ci6jT+EUi5D5sqHwzQ7tH00qRR7RkOqxw+rWswOikH0cYciQkB9fj TMSH8tf2MugU02HxF7TX3HOHYxDkbGaEStdjX6dTz4pPU3Ocraz9uHFAocdYxbhEQ1zq /4Rl3bJWbbVnaXhbDeYCaSKj4n6VILxkZ29xYudWF+g3Dvs8oTfw7OHJurrxAojnfFNt 5Qdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:references:in-reply-to:message-id:date:to :from:arc-authentication-results; bh=ZLkEJoGUWhYGZhL0S2FTZ8p0eygy1B9ydzgBIoNd1V0=; b=CJDDAqk4plBnnmtsdlQZO2hpohmpgojmnJKwcsurW5yhWFgiMXEhNfvXCzp/5cWEUf 4lINXn/18n4fG8v9TcuAV9NUjfMRxkOnDVJMfAQ66eSa7XPt4RRFaOezq8WMm8p4Fd8m MzDMBmJGt1Qoso6NYkmTuODDgw9MTnrQQVl5g7Kd5oNBv9YicG7elXZB6khFGMqFuMYI 3ZVcMObKZhDbL02VmxUMr/KNxc47mV+VI7qLxUu9ezgg5Ax19hnN0nKPggn/zZok5bjh FaKgCWhHdfDl5OcwkN/EsbvJzYHzq6BgNn1g7QoNTZo3NLwqgx1XrU4p4kETN2SHDMb3 oqBw== ARC-Authentication-Results: i=1; mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id d99si2803313ioj.8.2017.09.12.03.05.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Sep 2017 03:05:54 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dri32-0003EX-0P; Tue, 12 Sep 2017 10:04:04 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dri30-00039r-Ac for xen-devel@lists.xen.org; Tue, 12 Sep 2017 10:04:02 +0000 Received: from [85.158.139.211] by server-11.bemta-5.messagelabs.com id 83/0D-01760-111B7B95; Tue, 12 Sep 2017 10:04:01 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRWlGSWpSXmKPExsVysyfVTVdg4/Z Ig2MrLC2WfFzM4sDocXT3b6YAxijWzLyk/IoE1ox3R5axF2wSrrj/aSVbA+Mk/i5GLg4hgc2M Eh1v1zJ2MXICOacZJW6vEwSx2QQ0Je58/sQEYosISEtc+3wZrIZZIFLi8Icf7CC2sIC3xLJrC 5hBbBYBVYldT+eD1fAKWEosm72eBcSWEJCX2NV2kRXE5gSKr/j4iw1il4XE95c/GCcwci9gZF jFqFGcWlSWWqRraKaXVJSZnlGSm5iZo2toYKqXm1pcnJiempOYVKyXnJ+7iRHoXwYg2ME49X3 cIUZJDiYlUd4j67dHCvEl5adUZiQWZ8QXleakFh9ilOHgUJLgZd8AlBMsSk1PrUjLzAEGGkxa goNHSYT3Gkgrb3FBYm5xZjpE6hSjLkfHzbt/mIRY8vLzUqXEed+AFAmAFGWU5sGNgAX9JUZZK WFeRqCjhHgKUotyM0tQ5V8xinMwKgnz3gGZwpOZVwK36RXQEUxAR/Bc2gJyREkiQkqqgdHr/p oFb93E7CbJdexi3GR988LkP/2vzV7Lyk7Wa9WJ7Tz45G7bxGuyjF82rH5Q+EU7f+cfVm+RO62 ipyT36Uk78Lwo/C42j/s1z5flTvyv9v+Y8IE77IjzfXfD2u/Xas5M8P9pbf4xqupOVd6WxE/z eWZJmnySvD6F82nr4lt3RYr2fOWJuyWoxFKckWioxVxUnAgAjGmQ2XUCAAA= X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-13.tower-206.messagelabs.com!1505210640!95619857!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests=UPPERCASE_25_50 X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 46495 invoked from network); 12 Sep 2017 10:04:00 -0000 Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-13.tower-206.messagelabs.com with SMTP; 12 Sep 2017 10:04:00 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2695C15BF; Tue, 12 Sep 2017 03:04:00 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.206.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 381C43F578; Tue, 12 Sep 2017 03:03:59 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 12 Sep 2017 11:03:23 +0100 Message-Id: <20170912100330.2168-18-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170912100330.2168-1-julien.grall@arm.com> References: <20170912100330.2168-1-julien.grall@arm.com> Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org Subject: [Xen-devel] [PATCH v2 17/24] xen/arm: page: Clean-up the definition of MAIRVAL X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Currently MAIRVAL is defined in term of MAIR0VAL and MAIR1VAL which are both hardcoded value. This makes quite difficult to understand the value written in both registers. Rework the definition by using value of each attribute shifted by their associated index. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- Changes in v2: - Move this patch after "xen/arm: page: Use ARMv8 naming to improve readability" --- xen/include/asm-arm/page.h | 42 +++++++++++++++++++++++++----------------- 1 file changed, 25 insertions(+), 17 deletions(-) diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h index 899fd1801a..088746828d 100644 --- a/xen/include/asm-arm/page.h +++ b/xen/include/asm-arm/page.h @@ -22,6 +22,21 @@ #define LPAE_SH_INNER 0x3 /* + * Attribute Indexes. + * + * These are valid in the AttrIndx[2:0] field of an LPAE stage 1 page + * table entry. They are indexes into the bytes of the MAIR* + * registers, as defined above. + * + */ +#define MT_DEVICE_nGnRnE 0x0 +#define MT_NORMAL_NC 0x1 +#define MT_NORMAL_WT 0x2 +#define MT_NORMAL_WB 0x3 +#define MT_DEVICE_nGnRE 0x4 +#define MT_NORMAL 0x7 + +/* * LPAE Memory region attributes. Indexed by the AttrIndex bits of a * LPAE entry; the 8-bit fields are packed little-endian into MAIR0 and MAIR1. * @@ -35,24 +50,17 @@ * reserved 110 * MT_NORMAL 111 1111 1111 -- Write-back write-allocate */ -#define MAIR0VAL 0xeeaa4400 -#define MAIR1VAL 0xff000004 -#define MAIRVAL (MAIR0VAL|MAIR1VAL<<32) +#define MAIR(attr, mt) (_AC(attr, ULL) << ((mt) * 8)) -/* - * Attribute Indexes. - * - * These are valid in the AttrIndx[2:0] field of an LPAE stage 1 page - * table entry. They are indexes into the bytes of the MAIR* - * registers, as defined above. - * - */ -#define MT_DEVICE_nGnRnE 0x0 -#define MT_NORMAL_NC 0x1 -#define MT_NORMAL_WT 0x2 -#define MT_NORMAL_WB 0x3 -#define MT_DEVICE_nGnRE 0x4 -#define MT_NORMAL 0x7 +#define MAIRVAL (MAIR(0x00, MT_DEVICE_nGnRnE)| \ + MAIR(0x44, MT_NORMAL_NC) | \ + MAIR(0xaa, MT_NORMAL_WT) | \ + MAIR(0xee, MT_NORMAL_WB) | \ + MAIR(0x04, MT_DEVICE_nGnRE) | \ + MAIR(0xff, MT_NORMAL)) + +#define MAIR0VAL (MAIRVAL & 0xffffffff) +#define MAIR1VAL (MAIRVAL >> 32) #define PAGE_HYPERVISOR (MT_NORMAL) #define PAGE_HYPERVISOR_NOCACHE (MT_DEVICE_nGnRE)