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([185.25.64.249]) by mx.google.com with ESMTPSA id fw6sm14830368wib.1.2015.01.19.08.29.58 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 19 Jan 2015 08:29:59 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 19 Jan 2015 16:29:16 +0000 Message-Id: <1421684957-29884-10-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1421684957-29884-1-git-send-email-julien.grall@linaro.org> References: <1421684957-29884-1-git-send-email-julien.grall@linaro.org> Cc: stefano.stabellini@citrix.com, Julien Grall , tim@xen.org, ian.campbell@citrix.com Subject: [Xen-devel] [PATCH 09/10] xen/arm: vgic-v2: Take the lock when writing into GICD_CTLR X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: This register is shared between every vCPUs and the lock was already taken for read. Signed-off-by: Julien Grall --- This patch should be backported to Xen 4.4 and Xen 4.5. Although, it won't apply directly for Xen 4.4. --- xen/arch/arm/vgic-v2.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index 8c6ca72..3e5371f 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -281,7 +281,10 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) case GICD_CTLR: if ( dabt.size != DABT_WORD ) goto bad_width; /* Ignore all but the enable bit */ + vgic_lock(v); v->domain->arch.vgic.ctlr = (*r) & GICD_CTL_ENABLE; + vgic_unlock(v); + return 1; /* R/O -- write ignored */