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[50.57.142.19]) by mx.google.com with ESMTPS id dn9si5592337vcb.13.2014.10.26.19.04.51 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 26 Oct 2014 19:04:51 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XiZeA-00011j-TG; Mon, 27 Oct 2014 02:03:02 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XiZe8-00011Y-FK for xen-devel@lists.xenproject.org; Mon, 27 Oct 2014 02:03:00 +0000 Received: from [85.158.139.211] by server-16.bemta-5.messagelabs.com id A5/48-02693-3D7AD445; Mon, 27 Oct 2014 02:02:59 +0000 X-Env-Sender: wangyijing@huawei.com X-Msg-Ref: server-13.tower-206.messagelabs.com!1414375375!11129182!1 X-Originating-IP: [119.145.14.66] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTE5LjE0NS4xNC42NiA9PiA4NTI3\n X-StarScan-Received: X-StarScan-Version: 6.12.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 28801 invoked from network); 27 Oct 2014 02:02:58 -0000 Received: from szxga03-in.huawei.com (HELO szxga03-in.huawei.com) (119.145.14.66) by server-13.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 27 Oct 2014 02:02:58 -0000 Received: from 172.24.2.119 (EHLO szxeml421-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id AWD72191; Mon, 27 Oct 2014 10:02:54 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml421-hub.china.huawei.com (10.82.67.160) with Microsoft SMTP Server id 14.3.158.1; Mon, 27 Oct 2014 10:02:43 +0800 From: Yijing Wang To: Bjorn Helgaas Date: Mon, 27 Oct 2014 10:44:36 +0800 Message-ID: <1414377878-23497-2-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1414377878-23497-1-git-send-email-wangyijing@huawei.com> References: <1414377878-23497-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A02020A.544DA7CE.0167, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 4739155ef2af3613aca9f1bb26f729ae Cc: wangyijing@huawei.com, linux-pci@vger.kernel.org, xen-devel@lists.xenproject.org, David Vrabel Subject: [Xen-devel] [PATCH 1/3] x86/xen: Introduce a global flag to fix the MSI mask bug X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Commit 0e4ccb1505a9 ("PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()") fixed MSI mask bug which may cause kernel crash. But the commit made MSI code complex. Introduce a new global flag "pci_msi_ignore_mask" to ignore MSI/MSI-X to fix this issue, it's a cleaner solution. And the commit 0e4ccb1505a9 will be reverted in the later patch. Signed-off-by: Yijing Wang CC: David Vrabel CC: Konrad Rzeszutek Wilk CC: xen-devel@lists.xenproject.org Reviewed-by: David Vrabel --- arch/x86/pci/xen.c | 2 ++ drivers/pci/msi.c | 7 ++++++- include/linux/msi.h | 1 + 3 files changed, 9 insertions(+), 1 deletions(-) diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index 093f5f4..5ef62ed 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -427,6 +427,7 @@ int __init pci_xen_init(void) x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; x86_msi.msi_mask_irq = xen_nop_msi_mask_irq; x86_msi.msix_mask_irq = xen_nop_msix_mask_irq; + pci_msi_ignore_mask = 1; #endif return 0; } @@ -508,6 +509,7 @@ int __init pci_xen_initial_domain(void) x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; x86_msi.msi_mask_irq = xen_nop_msi_mask_irq; x86_msi.msix_mask_irq = xen_nop_msix_mask_irq; + pci_msi_ignore_mask = 1; #endif xen_setup_acpi_sci(); __acpi_register_gsi = acpi_register_gsi_xen; diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 38511d9..ecb5f54 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -23,6 +23,7 @@ #include "pci.h" static int pci_msi_enable = 1; +int pci_msi_ignore_mask; #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) @@ -166,7 +167,7 @@ u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) { u32 mask_bits = desc->masked; - if (!desc->msi_attrib.maskbit) + if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit) return 0; mask_bits &= ~mask; @@ -198,6 +199,10 @@ u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag) u32 mask_bits = desc->masked; unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL; + + if (pci_msi_ignore_mask) + return 0; + mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; if (flag) mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; diff --git a/include/linux/msi.h b/include/linux/msi.h index 44f4746..86dc501 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -10,6 +10,7 @@ struct msi_msg { u32 data; /* 16 bits of msi message data */ }; +extern int pci_msi_ignore_mask; /* Helper functions */ struct irq_data; struct msi_desc;