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[50.57.142.19]) by mx.google.com with ESMTPS id h61si864967qgh.80.2014.09.05.02.54.07 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 05 Sep 2014 02:54:08 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XPqCt-00077Q-9R; Fri, 05 Sep 2014 09:53:27 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XPqCs-00075N-3S for xen-devel@lists.xenproject.org; Fri, 05 Sep 2014 09:53:26 +0000 Received: from [85.158.137.68:63658] by server-15.bemta-3.messagelabs.com id 1A/4B-01573-51889045; Fri, 05 Sep 2014 09:53:25 +0000 X-Env-Sender: wangyijing@huawei.com X-Msg-Ref: server-2.tower-31.messagelabs.com!1409910800!12705814!1 X-Originating-IP: [119.145.14.64] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTE5LjE0NS4xNC42NCA9PiA4MDE5MQ==\n X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 16051 invoked from network); 5 Sep 2014 09:53:23 -0000 Received: from szxga01-in.huawei.com (HELO szxga01-in.huawei.com) (119.145.14.64) by server-2.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 5 Sep 2014 09:53:23 -0000 Received: from 172.24.2.119 (EHLO szxeml419-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CBG93492; Fri, 05 Sep 2014 17:46:11 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml419-hub.china.huawei.com (10.82.67.158) with Microsoft SMTP Server id 14.3.158.1; Fri, 5 Sep 2014 17:46:02 +0800 From: Yijing Wang To: Bjorn Helgaas Date: Fri, 5 Sep 2014 18:10:06 +0800 Message-ID: <1409911806-10519-22-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1409911806-10519-1-git-send-email-wangyijing@huawei.com> References: <1409911806-10519-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-pci@vger.kernel.org, Bharat.Bhushan@freescale.com, Yijing Wang , sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, Russell King , Joerg Roedel , x86@kernel.org, Sebastian Ott , Benjamin Herrenschmidt , xen-devel@lists.xenproject.org, arnab.basu@freescale.com, Arnd Bergmann , Chris Metcalf , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Xinwei Hu , Tony Luck , Ralf Baechle , iommu@lists.linux-foundation.org, Wuyun , linuxppc-dev@lists.ozlabs.org, "David S. Miller" Subject: [Xen-devel] [PATCH v1 21/21] PCI/MSI: Clean up unused MSI arch functions X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Now we use struct msi_chip in all platforms to configure MSI/MSI-X. We can clean up the unused arch functions. Signed-off-by: Yijing Wang Reviewed-by: Lucas Stach --- drivers/iommu/irq_remapping.c | 2 +- drivers/pci/msi.c | 99 ++++++++++++++++------------------------- include/linux/msi.h | 14 ------ 3 files changed, 39 insertions(+), 76 deletions(-) diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c index 99b1c0f..6e645f0 100644 --- a/drivers/iommu/irq_remapping.c +++ b/drivers/iommu/irq_remapping.c @@ -92,7 +92,7 @@ error: /* * Restore altered MSI descriptor fields and prevent just destroyed - * IRQs from tearing down again in default_teardown_msi_irqs() + * IRQs from tearing down again in teardown_msi_irqs() */ msidesc->irq = 0; msidesc->nvec_used = 0; diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index d78d637..e3e7f4f 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -34,50 +34,31 @@ struct msi_chip * __weak arch_find_msi_chip(struct pci_dev *dev) return dev->bus->msi; } -int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) -{ - struct msi_chip *chip = arch_find_msi_chip(dev); - int err; - - if (!chip || !chip->setup_irq) - return -EINVAL; - - err = chip->setup_irq(dev, desc); - if (err < 0) - return err; - - return 0; -} - -void __weak arch_teardown_msi_irq(unsigned int irq) -{ - struct msi_chip *chip = irq_get_chip_data(irq); - - if (!chip || !chip->teardown_irq) - return; - - chip->teardown_irq(irq); -} - -int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +int setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { struct msi_desc *entry; int ret; struct msi_chip *chip; chip = arch_find_msi_chip(dev); - if (chip && chip->setup_irqs) + if (!chip) + return -EINVAL; + + if (chip->setup_irqs) return chip->setup_irqs(dev, nvec, type); /* * If an architecture wants to support multiple MSI, it needs to - * override arch_setup_msi_irqs() + * implement chip->setup_irqs(). */ if (type == PCI_CAP_ID_MSI && nvec > 1) return 1; + if (!chip->setup_irq) + return -EINVAL; + list_for_each_entry(entry, &dev->msi_list, list) { - ret = arch_setup_msi_irq(dev, entry); + ret = chip->setup_irq(dev, entry); if (ret < 0) return ret; if (ret > 0) @@ -87,13 +68,20 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) return 0; } -/* - * We have a default implementation available as a separate non-weak - * function, as it is used by the Xen x86 PCI code - */ -void default_teardown_msi_irqs(struct pci_dev *dev) +static void teardown_msi_irqs(struct pci_dev *dev) { struct msi_desc *entry; + struct msi_chip *chip; + + chip = arch_find_msi_chip(dev); + if (!chip) + return; + + if (chip->teardown_irqs) + return chip->teardown_irqs(dev); + + if (!chip->teardown_irq) + return; list_for_each_entry(entry, &dev->msi_list, list) { int i, nvec; @@ -104,20 +92,10 @@ void default_teardown_msi_irqs(struct pci_dev *dev) else nvec = 1 << entry->msi_attrib.multiple; for (i = 0; i < nvec; i++) - arch_teardown_msi_irq(entry->irq + i); + chip->teardown_irq(entry->irq + i); } } -void __weak arch_teardown_msi_irqs(struct pci_dev *dev) -{ - struct msi_chip *chip = arch_find_msi_chip(dev); - - if (chip && chip->teardown_irqs) - return chip->teardown_irqs(dev); - - return default_teardown_msi_irqs(dev); -} - static void default_restore_msi_irq(struct pci_dev *dev, int irq) { struct msi_desc *entry; @@ -136,10 +114,18 @@ static void default_restore_msi_irq(struct pci_dev *dev, int irq) write_msi_msg(irq, &entry->msg); } -void __weak arch_restore_msi_irqs(struct pci_dev *dev) +static void default_restore_msi_irqs(struct pci_dev *dev) { - struct msi_chip *chip = arch_find_msi_chip(dev); + struct msi_desc *entry = NULL; + + list_for_each_entry(entry, &dev->msi_list, list) { + default_restore_msi_irq(dev, entry->irq); + } +} +static void restore_msi_irqs(struct pci_dev *dev) +{ + struct msi_chip *chip = arch_find_msi_chip(dev); if (chip && chip->restore_irqs) return chip->restore_irqs(dev); @@ -248,15 +234,6 @@ void unmask_msi_irq(struct irq_data *data) msi_set_mask_bit(data, 0); } -void default_restore_msi_irqs(struct pci_dev *dev) -{ - struct msi_desc *entry; - - list_for_each_entry(entry, &dev->msi_list, list) { - default_restore_msi_irq(dev, entry->irq); - } -} - void read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { BUG_ON(entry->dev->current_state != PCI_D0); @@ -360,7 +337,7 @@ static void free_msi_irqs(struct pci_dev *dev) BUG_ON(irq_has_action(entry->irq + i)); } - arch_teardown_msi_irqs(dev); + teardown_msi_irqs(dev); list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { if (entry->msi_attrib.is_msix) { @@ -430,7 +407,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev) pci_intx_for_msi(dev, 0); msi_set_enable(dev, 0); - arch_restore_msi_irqs(dev); + restore_msi_irqs(dev); pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap), @@ -453,7 +430,7 @@ static void __pci_restore_msix_state(struct pci_dev *dev) msix_clear_and_set_ctrl(dev, 0, PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); - arch_restore_msi_irqs(dev); + restore_msi_irqs(dev); list_for_each_entry(entry, &dev->msi_list, list) { msix_mask_irq(entry, entry->masked); } @@ -624,7 +601,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) list_add_tail(&entry->list, &dev->msi_list); /* Configure MSI capability structure */ - ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); + ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); if (ret) { msi_mask_irq(entry, mask, ~mask); free_msi_irqs(dev); @@ -740,7 +717,7 @@ static int msix_capability_init(struct pci_dev *dev, if (ret) return ret; - ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); + ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); if (ret) goto out_avail; diff --git a/include/linux/msi.h b/include/linux/msi.h index 92a51e7..d6e1f7c 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -51,20 +51,6 @@ struct msi_desc { struct kobject kobj; }; -/* - * The arch hooks to setup up msi irqs. Those functions are - * implemented as weak symbols so that they /can/ be overriden by - * architecture specific code if needed. - */ -int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc); -void arch_teardown_msi_irq(unsigned int irq); -int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); -void arch_teardown_msi_irqs(struct pci_dev *dev); -void arch_restore_msi_irqs(struct pci_dev *dev); - -void default_teardown_msi_irqs(struct pci_dev *dev); -void default_restore_msi_irqs(struct pci_dev *dev); - struct msi_chip { struct module *owner; struct device *dev;