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[50.57.142.19]) by mx.google.com with ESMTPS id gv1si5551665vdb.27.2014.07.14.09.41.13 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 14 Jul 2014 09:41:13 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X6jHd-0007Fk-3O; Mon, 14 Jul 2014 16:39:21 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X6jHb-0007Ed-No for xen-devel@lists.xen.org; Mon, 14 Jul 2014 16:39:19 +0000 Received: from [85.158.143.35:36614] by server-3.bemta-4.messagelabs.com id 10/F3-09960-6B704C35; Mon, 14 Jul 2014 16:39:18 +0000 X-Env-Sender: Ian.Campbell@citrix.com X-Msg-Ref: server-14.tower-21.messagelabs.com!1405355957!17694816!1 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 9559 invoked from network); 14 Jul 2014 16:39:18 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-14.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 14 Jul 2014 16:39:18 -0000 X-IronPort-AV: E=Sophos;i="5.01,659,1400025600"; d="scan'208";a="152692670" Received: from accessns.citrite.net (HELO FTLPEX01CL03.citrite.net) ([10.9.154.239]) by FTLPIPO02.CITRIX.COM with ESMTP; 14 Jul 2014 16:39:16 +0000 Received: from ukmail1.uk.xensource.com (10.80.16.128) by smtprelay.citrix.com (10.13.107.80) with Microsoft SMTP Server id 14.3.181.6; Mon, 14 Jul 2014 12:39:15 -0400 Received: from drall.uk.xensource.com ([10.80.16.71]) by ukmail1.uk.xensource.com with smtp (Exim 4.69) (envelope-from ) id 1X6jHW-0008Rn-Hq; Mon, 14 Jul 2014 17:39:15 +0100 Received: by drall.uk.xensource.com (sSMTP sendmail emulation); Mon, 14 Jul 2014 17:39:14 +0100 From: Ian Campbell To: Date: Mon, 14 Jul 2014 17:39:10 +0100 Message-ID: <1405355950-6461-5-git-send-email-ian.campbell@citrix.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1405355930.31863.5.camel@kazak.uk.xensource.com> References: <1405355930.31863.5.camel@kazak.uk.xensource.com> MIME-Version: 1.0 X-DLP: MIA2 Cc: julien.grall@linaro.org, tim@xen.org, Ian Campbell , stefano.stabellini@eu.citrix.com Subject: [Xen-devel] [PATCH 5/5] xen: arm: flush TLB after overwriting 1:1 mapping in boot page tables X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ian.campbell@citrix.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.173 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Otherwise a stale TLB entry can shadow the fixmap/UART or DTB mapping Signed-off-by: Ian Campbell Acked-by: Julien Grall --- xen/arch/arm/arm32/head.S | 13 ++++++++++++- xen/arch/arm/arm64/head.S | 13 ++++++++++++- 2 files changed, 24 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 348ca7d..a36c8fc 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -398,9 +398,20 @@ paging: ldr r4, =BOOT_FDT_VIRT_START mov r4, r4, lsr #(SECOND_SHIFT - 3) /* Slot for BOOT_FDT_VIRT_START */ strd r2, r3, [r1, r4] /* Map it in the early fdt slot */ - dsb 1: + /* + * Flush the TLB in case the 1:1 mapping happens to clash with + * the virtual addresses used by the fixmap or DTB. + */ + dsb /* Ensure any page table updates made above + * have occurred. */ + + isb + mcr CP32(r0, TLBIALLH) /* Flush hypervisor TLB */ + dsb /* Ensure completion of TLB flush */ + isb + PRINT("- Ready -\r\n") /* The boot CPU should go straight into C now */ diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 7152d9c..a50192e 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -432,9 +432,20 @@ paging: ldr x1, =BOOT_FDT_VIRT_START lsr x1, x1, #(SECOND_SHIFT - 3) /* x4 := Slot for BOOT_FDT_VIRT_START */ str x2, [x4, x1] /* Map it in the early fdt slot */ - dsb sy 1: + /* + * Flush the TLB in case the 1:1 mapping happens to clash with + * the virtual addresses used by the fixmap or DTB. + */ + dsb sy /* Ensure any page table updates made above + * have occurred. */ + + isb + tlbi alle2 + dsb sy /* Ensure completion of TLB flush */ + isb + PRINT("- Ready -\r\n") /* The boot CPU should go straight into C now */