From patchwork Wed Jul 9 13:34:54 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 33314 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ig0-f200.google.com (mail-ig0-f200.google.com [209.85.213.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id BC9A723932 for ; Wed, 9 Jul 2014 13:37:03 +0000 (UTC) Received: by mail-ig0-f200.google.com with SMTP id hn18sf6173230igb.3 for ; Wed, 09 Jul 2014 06:37:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:date:message-id:cc:subject :precedence:list-id:list-unsubscribe:list-post:list-help :list-subscribe:mime-version:sender:errors-to:x-original-sender :x-original-authentication-results:mailing-list:list-archive :content-type:content-transfer-encoding; bh=XP9q/9PFrSfHCQ13XmrO9p4Xwb+/JDhwZb4YPwhV0To=; b=m5Z8X+inBOaGXOROJ1s2qSu0IZHNRIOOBKjb62sLKO2L9soysj118LmExEGZqpJKOU il5arnsRf2KwFoM8o9h3KJ0IHuUGuNvw3GJ7gjxswFAg/yFToOfEB6Z2rPk3VSHlAPzi 2Y4R3z423DmGXnUveZPCYSurt038Rsk7PySnjKVLhd4Kk0YKBJP4N38vXCGkqNNgnMo2 S3QBwgT/1vosJHKHJjqeemLfR9pjOySk8qBRlqygpsML3B9CBuc6uuhKzuH2AvBNuyhx iLAlumftjMtbguMjX9eNcPvV10KSsoDcffES9cE8jM2hLYv56lOS1gdlUnwYC9adVyOR yWfQ== X-Gm-Message-State: ALoCoQlG+l52Q1Y5nJ/dp0q2xK3VxX515oea8zdloFTWK/Tz8mZFPSX5owZxUP5WwJCmOGvcZlF/ X-Received: by 10.182.166.36 with SMTP id zd4mr20422519obb.43.1404913023137; Wed, 09 Jul 2014 06:37:03 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.96.6 with SMTP id j6ls2608164qge.89.gmail; Wed, 09 Jul 2014 06:37:03 -0700 (PDT) X-Received: by 10.220.99.66 with SMTP id t2mr591799vcn.40.1404913023051; Wed, 09 Jul 2014 06:37:03 -0700 (PDT) Received: from mail-ve0-f180.google.com (mail-ve0-f180.google.com [209.85.128.180]) by mx.google.com with ESMTPS id v15si21522913vcj.8.2014.07.09.06.37.03 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 09 Jul 2014 06:37:03 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.180 as permitted sender) client-ip=209.85.128.180; Received: by mail-ve0-f180.google.com with SMTP id jw12so7105143veb.39 for ; Wed, 09 Jul 2014 06:37:03 -0700 (PDT) X-Received: by 10.221.41.135 with SMTP id tu7mr196299vcb.70.1404913022960; Wed, 09 Jul 2014 06:37:02 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp48503vcb; Wed, 9 Jul 2014 06:37:02 -0700 (PDT) X-Received: by 10.140.91.164 with SMTP id z33mr65525511qgd.65.1404913022533; Wed, 09 Jul 2014 06:37:02 -0700 (PDT) Received: from lists.xen.org (lists.xen.org. [50.57.142.19]) by mx.google.com with ESMTPS id c78si42508857qge.59.2014.07.09.06.37.01 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 09 Jul 2014 06:37:02 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X4s1Z-0004UW-7g; Wed, 09 Jul 2014 13:35:05 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X4s1V-0004UQ-36 for xen-devel@lists.xenproject.org; Wed, 09 Jul 2014 13:35:01 +0000 Received: from [85.158.143.35:20696] by server-1.bemta-4.messagelabs.com id 6F/37-09496-4054DB35; Wed, 09 Jul 2014 13:35:00 +0000 X-Env-Sender: julien.grall@linaro.org X-Msg-Ref: server-13.tower-21.messagelabs.com!1404912899!9550790!1 X-Originating-IP: [209.85.212.170] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 27310 invoked from network); 9 Jul 2014 13:34:59 -0000 Received: from mail-wi0-f170.google.com (HELO mail-wi0-f170.google.com) (209.85.212.170) by server-13.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 9 Jul 2014 13:34:59 -0000 Received: by mail-wi0-f170.google.com with SMTP id cc10so2808038wib.3 for ; Wed, 09 Jul 2014 06:34:59 -0700 (PDT) X-Received: by 10.194.62.140 with SMTP id y12mr49077400wjr.27.1404912898975; Wed, 09 Jul 2014 06:34:58 -0700 (PDT) Received: from belegaer.uk.xensource.com ([185.25.64.249]) by mx.google.com with ESMTPSA id go4sm31990116wjc.39.2014.07.09.06.34.57 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 09 Jul 2014 06:34:58 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 9 Jul 2014 14:34:54 +0100 Message-Id: <1404912894-11484-1-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 Cc: stefano.stabellini@citrix.com, Julien Grall , tim@xen.org, ian.campbell@citrix.com Subject: [Xen-devel] [PATCH] xen/arm: Some clean up in time.c X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.180 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: The file xen/arm/time.c contains some unused code: - calibrate_timer: firmware already set correctly CNTFRQ. If it's not the case the device tree will containt a property clock-frequency in the timer node - USE_HYP_TIMER: It's set unconditionally to 1. I didn't see any recent model having issue with the hyp timer. I think we can drop it safely. Signed-off-by: Julien Grall Acked-by: Ian Campbell --- xen/arch/arm/time.c | 52 --------------------------------------------------- 1 file changed, 52 deletions(-) diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index 4c3e1a6..a6436f1 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -36,13 +36,6 @@ #include #include -/* - * Unfortunately the hypervisor timer interrupt appears to be buggy in - * some versions of the model. Disable this to use the physical timer - * instead. - */ -#define USE_HYP_TIMER 1 - uint64_t __read_mostly boot_count; /* For fine-grained timekeeping, we use the ARM "Generic Timer", a @@ -68,37 +61,6 @@ unsigned int timer_get_irq(enum timer_ppi ppi) return muldiv64(ns, 1000 * cpu_khz, SECONDS(1)); } -/* TODO: On a real system the firmware would have set the frequency in - the CNTFRQ register. Also we'd need to use devicetree to find - the RTC. When we've seen some real systems, we can delete this. -static uint32_t calibrate_timer(void) -{ - uint32_t sec; - uint64_t start, end; - paddr_t rtc_base = 0x1C170000ull; - volatile uint32_t *rtc; - - ASSERT(!local_irq_is_enabled()); - set_fixmap(FIXMAP_MISC, rtc_base >> PAGE_SHIFT, DEV_SHARED); - rtc = (uint32_t *) FIXMAP_ADDR(FIXMAP_MISC); - - printk("Calibrating timer against RTC..."); - // Turn on the RTC - rtc[3] = 1; - // Wait for an edge - sec = rtc[0] + 1; - do {} while ( rtc[0] != sec ); - // Now time a few seconds - start = READ_SYSREG64(CNTPCT_EL0); - do {} while ( rtc[0] < sec + 32 ); - end = READ_SYSREG64(CNTPCT_EL0); - printk("done.\n"); - - clear_fixmap(FIXMAP_MISC); - return (end - start) / 32; -} -*/ - /* Set up the timer on the boot CPU */ int __init init_xen_time(void) { @@ -169,22 +131,13 @@ int reprogram_timer(s_time_t timeout) if ( timeout == 0 ) { -#if USE_HYP_TIMER WRITE_SYSREG32(0, CNTHP_CTL_EL2); -#else - WRITE_SYSREG32(0, CNTP_CTL_EL0); -#endif return 1; } deadline = ns_to_ticks(timeout) + boot_count; -#if USE_HYP_TIMER WRITE_SYSREG64(deadline, CNTHP_CVAL_EL2); WRITE_SYSREG32(CNTx_CTL_ENABLE, CNTHP_CTL_EL2); -#else - WRITE_SYSREG64(deadline, CNTP_CVAL_EL0); - WRITE_SYSREG32(CNTx_CTL_ENABLE, CNTP_CTL_EL0); -#endif isb(); /* No need to check for timers in the past; the Generic Timer fires @@ -226,13 +179,8 @@ void __cpuinit init_timer_interrupt(void) { /* Sensible defaults */ WRITE_SYSREG64(0, CNTVOFF_EL2); /* No VM-specific offset */ -#if USE_HYP_TIMER /* Do not let the VMs program the physical timer, only read the physical counter */ WRITE_SYSREG32(CNTHCTL_PA, CNTHCTL_EL2); -#else - /* Cannot let VMs access physical counter if we are using it */ - WRITE_SYSREG32(0, CNTHCTL_EL2); -#endif WRITE_SYSREG32(0, CNTP_CTL_EL0); /* Physical timer disabled */ WRITE_SYSREG32(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ isb();