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[50.57.142.19]) by mx.google.com with ESMTPS id z7si7763579ign.25.2014.07.09.05.33.00 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 09 Jul 2014 05:33:01 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X4r1a-0000Po-VP; Wed, 09 Jul 2014 12:31:02 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X4r1Y-0000PU-I0 for xen-devel@lists.xen.org; Wed, 09 Jul 2014 12:31:00 +0000 Received: from [85.158.139.211:26769] by server-5.bemta-5.messagelabs.com id 32/34-29625-3063DB35; Wed, 09 Jul 2014 12:30:59 +0000 X-Env-Sender: Ian.Campbell@citrix.com X-Msg-Ref: server-12.tower-206.messagelabs.com!1404909057!14535359!1 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 14456 invoked from network); 9 Jul 2014 12:30:59 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-12.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 9 Jul 2014 12:30:59 -0000 X-IronPort-AV: E=Sophos;i="5.01,631,1400025600"; d="scan'208";a="151209474" Received: from accessns.citrite.net (HELO FTLPEX01CL01.citrite.net) ([10.9.154.239]) by FTLPIPO02.CITRIX.COM with ESMTP; 09 Jul 2014 12:30:57 +0000 Received: from ukmail1.uk.xensource.com (10.80.16.128) by smtprelay.citrix.com (10.13.107.78) with Microsoft SMTP Server id 14.3.181.6; Wed, 9 Jul 2014 08:30:57 -0400 Received: from drall.uk.xensource.com ([10.80.16.71]) by ukmail1.uk.xensource.com with smtp (Exim 4.69) (envelope-from ) id 1X4r1T-0001pH-Re; Wed, 09 Jul 2014 13:30:56 +0100 Received: by drall.uk.xensource.com (sSMTP sendmail emulation); Wed, 09 Jul 2014 13:30:55 +0100 From: Ian Campbell To: Date: Wed, 9 Jul 2014 13:30:54 +0100 Message-ID: <1404909054-3467-2-git-send-email-ian.campbell@citrix.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1404909054-3467-1-git-send-email-ian.campbell@citrix.com> References: <1404909054-3467-1-git-send-email-ian.campbell@citrix.com> MIME-Version: 1.0 X-DLP: MIA2 Cc: Ian Campbell , Anup Patel , stefano.stabellini@eu.citrix.com, Vijaya Kumar K , julien.grall@linaro.org, tim@xen.org, Pranavkumar Sawargaonkar Subject: [Xen-devel] [PATCH v2 2/2] xen/arm: Fix PLATFORM_QUIRK_GIC_64K_STRIDE X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ian.campbell@citrix.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: The patch "xen/arm: use ioremap to map gic-v2 registers" handled this quirk by mapping a 64K+1 page region, but the code continued to assume that GICC_DIR was at offset 0x1000 from the start of the mapping. Fix this by mapping both pages of the GICC space independently and adjusting the accessor function to use the correct page. Signed-off-by: Ian Campbell Cc: Vijaya Kumar K Cc: Pranavkumar Sawargaonkar Cc: Anup Patel Acked-by: Julien Grall --- v2: Use unsigned int for page Correct check for mapping failure. --- xen/arch/arm/gic-v2.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 2795635..009307a 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -65,7 +65,7 @@ static struct { paddr_t dbase; /* Address of distributor registers */ void __iomem * map_dbase; /* IO mapped Address of distributor registers */ paddr_t cbase; /* Address of CPU interface registers */ - void __iomem * map_cbase; /* IO mapped Address of CPU interface registers */ + void __iomem * map_cbase[2]; /* IO mapped Address of CPU interface registers */ paddr_t hbase; /* Address of virtual interface registers */ void __iomem * map_hbase; /* IO Address of virtual interface registers */ paddr_t vbase; /* Address of virtual cpu interface registers */ @@ -100,12 +100,16 @@ static inline uint32_t readl_gicd(unsigned int offset) static inline void writel_gicc(uint32_t val, unsigned int offset) { - writel_relaxed(val, gicv2.map_cbase + offset); + unsigned int page = offset >> PAGE_SHIFT; + offset &= ~PAGE_MASK; + writel_relaxed(val, gicv2.map_cbase[page] + offset); } static inline uint32_t readl_gicc(unsigned int offset) { - return readl_relaxed(gicv2.map_cbase + offset); + unsigned int page = offset >> PAGE_SHIFT; + offset &= ~PAGE_MASK; + return readl_relaxed(gicv2.map_cbase[page] + offset); } static inline void writel_gich(uint32_t val, unsigned int offset) @@ -665,12 +669,15 @@ static int __init gicv2_init(struct dt_device_node *node, const void *data) if ( !gicv2.map_dbase ) panic("GICv2: Failed to ioremap for GIC distributor\n"); + gicv2.map_cbase[0] = ioremap_nocache(gicv2.cbase, PAGE_SIZE); + if ( platform_has_quirk(PLATFORM_QUIRK_GIC_64K_STRIDE) ) - gicv2.map_cbase = ioremap_nocache(gicv2.cbase, PAGE_SIZE * 0x10); + gicv2.map_cbase[1] = ioremap_nocache(gicv2.cbase + PAGE_SIZE * 0x10, + PAGE_SIZE); else - gicv2.map_cbase = ioremap_nocache(gicv2.cbase, PAGE_SIZE * 2); + gicv2.map_cbase[1] = ioremap_nocache(gicv2.cbase + PAGE_SIZE, PAGE_SIZE); - if ( !gicv2.map_cbase ) + if ( !gicv2.map_cbase[0] || !gicv2.map_cbase[1] ) panic("GICv2: Failed to ioremap for GIC CPU interface\n"); gicv2.map_hbase = ioremap_nocache(gicv2.hbase, PAGE_SIZE);