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[50.57.142.19]) by mx.google.com with ESMTPS id n104si22827986qgd.74.2014.06.03.09.09.47 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 03 Jun 2014 09:09:48 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WrrFJ-0000DW-Lb; Tue, 03 Jun 2014 16:07:29 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WrrFH-0000DJ-WA for xen-devel@lists.xensource.com; Tue, 03 Jun 2014 16:07:28 +0000 Received: from [193.109.254.147:32818] by server-11.bemta-14.messagelabs.com id 73/61-09902-FB2FD835; Tue, 03 Jun 2014 16:07:27 +0000 X-Env-Sender: Stefano.Stabellini@citrix.com X-Msg-Ref: server-15.tower-27.messagelabs.com!1401811645!8893761!1 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 6661 invoked from network); 3 Jun 2014 16:07:26 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-15.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 3 Jun 2014 16:07:26 -0000 X-IronPort-AV: E=Sophos;i="4.98,966,1392163200"; d="scan'208";a="138679353" Received: from accessns.citrite.net (HELO FTLPEX01CL02.citrite.net) ([10.9.154.239]) by FTLPIPO02.CITRIX.COM with ESMTP; 03 Jun 2014 16:07:24 +0000 Received: from ukmail1.uk.xensource.com (10.80.16.128) by smtprelay.citrix.com (10.13.107.79) with Microsoft SMTP Server id 14.3.181.6; Tue, 3 Jun 2014 12:07:24 -0400 Received: from kaball.uk.xensource.com ([10.80.2.59]) by ukmail1.uk.xensource.com with esmtp (Exim 4.69) (envelope-from ) id 1WrrF9-0003um-54; Tue, 03 Jun 2014 17:07:19 +0100 From: Stefano Stabellini To: Date: Tue, 3 Jun 2014 17:07:06 +0100 Message-ID: <1401811627-4389-1-git-send-email-stefano.stabellini@eu.citrix.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 X-DLP: MIA2 Cc: julien.grall@citrix.com, Ian.Campbell@citrix.com, Stefano Stabellini Subject: [Xen-devel] [PATCH v2 1/2] xen/arm: ignore guest writes to GICD_ITARGETSR for SPIs X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: stefano.stabellini@eu.citrix.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.181 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Ignore guest writes to GICD_ITARGETSR that set the target cpu to a cpu other than cpu0 for SPIs. Also ignore guest writes to GICD_ITARGETSR for PPIs and SGIs as they can only be delivered to the same cpu and that has already been configured at initialization time. Signed-off-by: Stefano Stabellini --- Changes in v2: - ignore writes to rank 0; - don't print a warning for ignoring writes to GICD_ITARGETSR; - add a comment in the code to remember that we don't implement writes to GICD_ITARGETSR. --- xen/arch/arm/vgic.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index cb8df3a..1304b5e 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -584,6 +584,13 @@ static int vgic_distr_mmio_write(struct vcpu *v, mmio_info_t *info) if ( dabt.size != 0 && dabt.size != 2 ) goto bad_width; rank = vgic_irq_rank(v, 8, gicd_reg - GICD_ITARGETSR); if ( rank == NULL) goto write_ignore; + /* only same vcpu delivery can be allowed for PPIs and SGIs */ + if ( REG_RANK_NR(8, gicd_reg - GICD_ITARGETSR) == 0 ) + return 1; + /* SPI delivery to secondary vcpus is unimplemented */ + if ( REG_RANK_NR(8, gicd_reg - GICD_ITARGETSR) > 0 && + *r != (1|1<<8|1<<16|1<<24) ) + return 1; vgic_lock_rank(v, rank); if ( dabt.size == 2 ) rank->itargets[REG_RANK_INDEX(8, gicd_reg - GICD_ITARGETSR)] = *r;