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[50.57.142.19]) by mx.google.com with ESMTPS id eb17si727240veb.76.2014.05.09.06.26.50 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 09 May 2014 06:26:51 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WiknP-0007ZM-C6; Fri, 09 May 2014 13:25:03 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WiknN-0007Z7-D0 for xen-devel@lists.xenproject.org; Fri, 09 May 2014 13:25:01 +0000 Received: from [85.158.143.35:28411] by server-1.bemta-4.messagelabs.com id 48/E7-09853-C27DC635; Fri, 09 May 2014 13:25:00 +0000 X-Env-Sender: Ian.Campbell@citrix.com X-Msg-Ref: server-8.tower-21.messagelabs.com!1399641898!3916546!1 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 23668 invoked from network); 9 May 2014 13:25:00 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-8.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 9 May 2014 13:25:00 -0000 X-IronPort-AV: E=Sophos; i="4.97,1018,1389744000"; d="scan'208"; a="128484420" Received: from accessns.citrite.net (HELO FTLPEX01CL03.citrite.net) ([10.9.154.239]) by FTLPIPO02.CITRIX.COM with ESMTP; 09 May 2014 13:24:58 +0000 Received: from kazak.uk.xensource.com (10.80.2.80) by FTLPEX01CL03.citrite.net (10.13.107.80) with Microsoft SMTP Server id 14.3.181.6; Fri, 9 May 2014 09:24:57 -0400 Message-ID: <1399641896.561.9.camel@kazak.uk.xensource.com> From: Ian Campbell To: Vladimir Murzin Date: Fri, 9 May 2014 14:24:56 +0100 In-Reply-To: <1398761926.4457.14.camel@kazak.uk.xensource.com> References: <1398589848-14731-1-git-send-email-murzin.v@gmail.com> <1398761926.4457.14.camel@kazak.uk.xensource.com> Organization: Citrix Systems, Inc. X-Mailer: Evolution 3.12.1-1 MIME-Version: 1.0 X-Originating-IP: [10.80.2.80] X-DLP: MIA1 Cc: "xen-devel@lists.xenproject.org" , David Vrabel , Jan Beulich Subject: [Xen-devel] [PATCH] xen: arm: bitops take unsigned int (Was: Re: [PATCH] xen/arm64: disable alignment check) X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ian.campbell@citrix.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.177 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: On Tue, 2014-04-29 at 09:58 +0100, Ian Campbell wrote: > On Tue, 2014-04-29 at 08:38 +0100, Vladimir Murzin wrote: > > On Mon, Apr 28, 2014 at 11:43 AM, Ian Campbell wrote: > > > But I also wanted confirmation that the problematic instruction was > > > generated by gcc and not by some handcoded asm somewhere which we hadn't > > > properly fixed. > > > I believe it comes form test_bit (xen/include/asm-arm/bitops.h). > > Ah, then I think this code needs fixing too. Probably switching to > unsigned int * throughout would work, what do you think? I finally managed to upgrade to a new enough kernel to trigger this. This Works For Me(tm), along with the Linux patch "xen/events/fifo: correctly align bitops" which is queued for 3.15 Linus (but not sent yet?) 8<------------------- >From aa6afe6520ea22241fb0ce430ef315c49a73867f Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Thu, 8 May 2014 16:13:55 +0100 Subject: [PATCH] xen: arm: bitops take unsigned int Xen bitmaps can be 4 rather than 8 byte aligned, so use the appropriate type. Otherwise the compiler can generate unaligned 8 byte accesses and cause traps. Signed-off-by: Ian Campbell --- xen/include/asm-arm/bitops.h | 37 +++++++++++++++++++------------------ 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/xen/include/asm-arm/bitops.h b/xen/include/asm-arm/bitops.h index 0a7caee..25f96c8 100644 --- a/xen/include/asm-arm/bitops.h +++ b/xen/include/asm-arm/bitops.h @@ -18,13 +18,14 @@ #define __set_bit(n,p) set_bit(n,p) #define __clear_bit(n,p) clear_bit(n,p) +#define BITS_PER_WORD 32 #define BIT(nr) (1UL << (nr)) -#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) -#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) +#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_WORD)) +#define BIT_WORD(nr) ((nr) / BITS_PER_WORD) #define BITS_PER_BYTE 8 -#define ADDR (*(volatile long *) addr) -#define CONST_ADDR (*(const volatile long *) addr) +#define ADDR (*(volatile int *) addr) +#define CONST_ADDR (*(const volatile int *) addr) #if defined(CONFIG_ARM_32) # include @@ -45,10 +46,10 @@ */ static inline int __test_and_set_bit(int nr, volatile void *addr) { - unsigned long mask = BIT_MASK(nr); - volatile unsigned long *p = - ((volatile unsigned long *)addr) + BIT_WORD(nr); - unsigned long old = *p; + unsigned int mask = BIT_MASK(nr); + volatile unsigned int *p = + ((volatile unsigned int *)addr) + BIT_WORD(nr); + unsigned int old = *p; *p = old | mask; return (old & mask) != 0; @@ -65,10 +66,10 @@ static inline int __test_and_set_bit(int nr, volatile void *addr) */ static inline int __test_and_clear_bit(int nr, volatile void *addr) { - unsigned long mask = BIT_MASK(nr); - volatile unsigned long *p = - ((volatile unsigned long *)addr) + BIT_WORD(nr); - unsigned long old = *p; + unsigned int mask = BIT_MASK(nr); + volatile unsigned int *p = + ((volatile unsigned int *)addr) + BIT_WORD(nr); + unsigned int old = *p; *p = old & ~mask; return (old & mask) != 0; @@ -78,10 +79,10 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr) static inline int __test_and_change_bit(int nr, volatile void *addr) { - unsigned long mask = BIT_MASK(nr); - volatile unsigned long *p = - ((volatile unsigned long *)addr) + BIT_WORD(nr); - unsigned long old = *p; + unsigned int mask = BIT_MASK(nr); + volatile unsigned int *p = + ((volatile unsigned int *)addr) + BIT_WORD(nr); + unsigned int old = *p; *p = old ^ mask; return (old & mask) != 0; @@ -94,8 +95,8 @@ static inline int __test_and_change_bit(int nr, */ static inline int test_bit(int nr, const volatile void *addr) { - const volatile unsigned long *p = (const volatile unsigned long *)addr; - return 1UL & (p[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1))); + const volatile unsigned int *p = (const volatile unsigned int *)addr; + return 1UL & (p[BIT_WORD(nr)] >> (nr & (BITS_PER_WORD-1))); } static inline int constant_fls(int x)