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[50.57.142.19]) by mx.google.com with ESMTPS id d5si13161300qad.155.2014.04.22.06.04.33 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 22 Apr 2014 06:04:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WcaKU-0002Et-K9; Tue, 22 Apr 2014 13:01:42 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WcaI1-0001h6-CT for xen-devel@lists.xenproject.org; Tue, 22 Apr 2014 12:59:44 +0000 Received: from [85.158.139.211:49282] by server-3.bemta-5.messagelabs.com id A8/24-28132-C9766535; Tue, 22 Apr 2014 12:59:08 +0000 X-Env-Sender: julien.grall@linaro.org X-Msg-Ref: server-14.tower-206.messagelabs.com!1398171547!2833313!1 X-Originating-IP: [74.125.83.54] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.11.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 14366 invoked from network); 22 Apr 2014 12:59:07 -0000 Received: from mail-ee0-f54.google.com (HELO mail-ee0-f54.google.com) (74.125.83.54) by server-14.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 22 Apr 2014 12:59:07 -0000 Received: by mail-ee0-f54.google.com with SMTP id d49so4685077eek.27 for ; Tue, 22 Apr 2014 05:59:07 -0700 (PDT) X-Received: by 10.15.64.132 with SMTP id o4mr55382130eex.14.1398171547483; Tue, 22 Apr 2014 05:59:07 -0700 (PDT) Received: from belegaer.uk.xensource.com ([185.25.64.249]) by mx.google.com with ESMTPSA id x45sm112862825eef.15.2014.04.22.05.59.05 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Apr 2014 05:59:06 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 22 Apr 2014 13:58:40 +0100 Message-Id: <1398171530-27391-9-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1398171530-27391-1-git-send-email-julien.grall@linaro.org> References: <1398171530-27391-1-git-send-email-julien.grall@linaro.org> Cc: stefano.stabellini@citrix.com, Julien Grall , tim@xen.org, ian.campbell@citrix.com Subject: [Xen-devel] [PATCH v4 08/18] xen/arm: IRQ: Move IRQ management from gic.c to irq.c X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: The file gic.c contains functions and variables which is not related to the GIC: - release_irq - setup_irq - gic_route_irq_to_guest - {,local_}irq_desc Move all theses functions/variables in irq.c Signed-off-by: Julien Grall Acked-by: Ian Campbell --- Changes in v3: - Split the patch in 2: refactoring + code motion Changes in v2: - Patch added --- xen/arch/arm/gic.c | 102 ++------------------------------------------- xen/arch/arm/irq.c | 97 ++++++++++++++++++++++++++++++++++++++++++ xen/include/asm-arm/gic.h | 4 ++ 3 files changed, 104 insertions(+), 99 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 90b129d..77dfecf 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -52,8 +52,6 @@ static struct { spinlock_t lock; } gic; -static irq_desc_t irq_desc[NR_IRQS]; -static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc); static DEFINE_PER_CPU(uint64_t, lr_mask); static unsigned nr_lrs; @@ -88,12 +86,6 @@ unsigned int gic_number_lines(void) return gic.lines; } -irq_desc_t *__irq_to_desc(int irq) -{ - if (irq < NR_LOCAL_IRQS) return &this_cpu(local_irq_desc)[irq]; - return &irq_desc[irq-NR_LOCAL_IRQS]; -} - void gic_save_state(struct vcpu *v) { int i; @@ -285,9 +277,9 @@ static int gic_route_irq(unsigned int irq, bool_t level, /* Program the GIC to route an interrupt to a guest * - desc.lock must be held */ -static void gic_route_irq_to_guest(struct domain *d, struct irq_desc *desc, - bool_t level, const cpumask_t *cpu_mask, - unsigned int priority) +void gic_route_irq_to_guest(struct domain *d, struct irq_desc *desc, + bool_t level, const cpumask_t *cpu_mask, + unsigned int priority) { struct pending_irq *p; ASSERT(spin_is_locked(&desc->lock)); @@ -591,59 +583,6 @@ void gic_route_spis(void) } } -void release_irq(unsigned int irq) -{ - struct irq_desc *desc; - unsigned long flags; - struct irqaction *action; - - desc = irq_to_desc(irq); - - desc->handler->shutdown(desc); - - spin_lock_irqsave(&desc->lock,flags); - action = desc->action; - desc->action = NULL; - desc->status &= ~IRQ_GUEST; - - spin_unlock_irqrestore(&desc->lock,flags); - - /* Wait to make sure it's not being used on another CPU */ - do { smp_mb(); } while ( desc->status & IRQ_INPROGRESS ); - - if (action && action->free_on_release) - xfree(action); -} - -static int __setup_irq(struct irq_desc *desc, struct irqaction *new) -{ - if ( desc->action != NULL ) - return -EBUSY; - - desc->action = new; - dsb(sy); - - return 0; -} - -int setup_dt_irq(const struct dt_irq *irq, struct irqaction *new) -{ - int rc; - unsigned long flags; - struct irq_desc *desc; - - desc = irq_to_desc(irq->irq); - - spin_lock_irqsave(&desc->lock, flags); - rc = __setup_irq(desc, new); - spin_unlock_irqrestore(&desc->lock, flags); - - if ( !rc ) - desc->handler->startup(desc); - - return rc; -} - static inline void gic_set_lr(int lr, struct pending_irq *p, unsigned int state) { @@ -782,41 +721,6 @@ void gic_inject(void) gic_inject_irq_start(); } -int route_dt_irq_to_guest(struct domain *d, const struct dt_irq *irq, - const char * devname) -{ - struct irqaction *action; - struct irq_desc *desc = irq_to_desc(irq->irq); - unsigned long flags; - int retval; - bool_t level; - - action = xmalloc(struct irqaction); - if (!action) - return -ENOMEM; - - action->dev_id = d; - action->name = devname; - action->free_on_release = 1; - - spin_lock_irqsave(&desc->lock, flags); - - retval = __setup_irq(desc, action); - if ( retval ) - { - xfree(action); - goto out; - } - - level = dt_irq_is_level_triggered(irq); - gic_route_irq_to_guest(d, desc, level, cpumask_of(smp_processor_id()), - GIC_PRI_IRQ); - -out: - spin_unlock_irqrestore(&desc->lock, flags); - return retval; -} - static void do_sgi(struct cpu_user_regs *regs, int othercpu, enum gic_sgi sgi) { /* Lower the priority */ diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index b3bfebc..f3a30bd 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -44,6 +44,15 @@ hw_irq_controller no_irq_type = { .end = end_none }; +static irq_desc_t irq_desc[NR_IRQS]; +static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc); + +irq_desc_t *__irq_to_desc(int irq) +{ + if (irq < NR_LOCAL_IRQS) return &this_cpu(local_irq_desc)[irq]; + return &irq_desc[irq-NR_LOCAL_IRQS]; +} + int __init arch_init_one_irq_desc(struct irq_desc *desc) { return 0; @@ -188,6 +197,94 @@ out_no_end: irq_exit(); } +void release_irq(unsigned int irq) +{ + struct irq_desc *desc; + unsigned long flags; + struct irqaction *action; + + desc = irq_to_desc(irq); + + desc->handler->shutdown(desc); + + spin_lock_irqsave(&desc->lock,flags); + action = desc->action; + desc->action = NULL; + desc->status &= ~IRQ_GUEST; + + spin_unlock_irqrestore(&desc->lock,flags); + + /* Wait to make sure it's not being used on another CPU */ + do { smp_mb(); } while ( desc->status & IRQ_INPROGRESS ); + + if ( action && action->free_on_release ) + xfree(action); +} + +static int __setup_irq(struct irq_desc *desc, struct irqaction *new) +{ + if ( desc->action != NULL ) + return -EBUSY; + + desc->action = new; + dsb(sy); + + return 0; +} + +int setup_dt_irq(const struct dt_irq *irq, struct irqaction *new) +{ + int rc; + unsigned long flags; + struct irq_desc *desc; + + desc = irq_to_desc(irq->irq); + + spin_lock_irqsave(&desc->lock, flags); + rc = __setup_irq(desc, new); + spin_unlock_irqrestore(&desc->lock, flags); + + if ( !rc ) + desc->handler->startup(desc); + + return rc; +} + +int route_dt_irq_to_guest(struct domain *d, const struct dt_irq *irq, + const char * devname) +{ + struct irqaction *action; + struct irq_desc *desc = irq_to_desc(irq->irq); + unsigned long flags; + int retval; + bool_t level; + + action = xmalloc(struct irqaction); + if (!action) + return -ENOMEM; + + action->dev_id = d; + action->name = devname; + action->free_on_release = 1; + + spin_lock_irqsave(&desc->lock, flags); + + retval = __setup_irq(desc, action); + if ( retval ) + { + xfree(action); + goto out; + } + + level = dt_irq_is_level_triggered(irq); + gic_route_irq_to_guest(d, desc, level, cpumask_of(smp_processor_id()), + GIC_PRI_IRQ); + +out: + spin_unlock_irqrestore(&desc->lock, flags); + return retval; +} + /* * pirq event channels. We don't use these on ARM, instead we use the * features of the GIC to inject virtualised normal interrupts. diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 9489c04..0e6e325 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -153,6 +153,7 @@ #ifndef __ASSEMBLY__ #include +#include #define DT_MATCH_GIC DT_MATCH_COMPATIBLE("arm,cortex-a15-gic"), \ DT_MATCH_COMPATIBLE("arm,cortex-a7-gic") @@ -170,6 +171,9 @@ extern struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq); extern void gic_route_dt_irq(const struct dt_irq *irq, const cpumask_t *cpu_mask, unsigned int priority); +extern void gic_route_irq_to_guest(struct domain *, struct irq_desc *desc, + bool_t level, const cpumask_t *cpu_mask, + unsigned int priority); extern void gic_route_ppis(void); extern void gic_route_spis(void);