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[50.57.142.19]) by mx.google.com with ESMTPS id s3si11046970qas.204.2014.04.22.06.02.56 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 22 Apr 2014 06:02:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WcaIe-0001k0-4t; Tue, 22 Apr 2014 12:59:48 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WcaHq-0001fv-7y for xen-devel@lists.xenproject.org; Tue, 22 Apr 2014 12:58:58 +0000 Received: from [193.109.254.147:63431] by server-14.bemta-14.messagelabs.com id 71/31-08195-19766535; Tue, 22 Apr 2014 12:58:57 +0000 X-Env-Sender: julien.grall@linaro.org X-Msg-Ref: server-13.tower-27.messagelabs.com!1398171536!118485!1 X-Originating-IP: [74.125.83.52] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 25809 invoked from network); 22 Apr 2014 12:58:56 -0000 Received: from mail-ee0-f52.google.com (HELO mail-ee0-f52.google.com) (74.125.83.52) by server-13.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 22 Apr 2014 12:58:56 -0000 Received: by mail-ee0-f52.google.com with SMTP id e49so4627410eek.11 for ; Tue, 22 Apr 2014 05:58:56 -0700 (PDT) X-Received: by 10.14.183.7 with SMTP id p7mr2146523eem.107.1398171536260; Tue, 22 Apr 2014 05:58:56 -0700 (PDT) Received: from belegaer.uk.xensource.com ([185.25.64.249]) by mx.google.com with ESMTPSA id x45sm112862825eef.15.2014.04.22.05.58.54 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Apr 2014 05:58:55 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 22 Apr 2014 13:58:33 +0100 Message-Id: <1398171530-27391-2-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1398171530-27391-1-git-send-email-julien.grall@linaro.org> References: <1398171530-27391-1-git-send-email-julien.grall@linaro.org> Cc: stefano.stabellini@citrix.com, Julien Grall , tim@xen.org, ian.campbell@citrix.com Subject: [Xen-devel] [PATCH v4 01/18] xen/arm: timer: replace timer_dt_irq by timer_get_irq X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: The function is nearly only used to retrieve the IRQ number. There is one place where the IRQ type is used (in domain_build.c) but as the timer IRQ is virtualised for guest we might not have the same property (e.g active-low level sensitive interrupt). Replace timer_dt_irq by timer_get_irq which will return the IRQ number. Signed-off-by: Julien Grall Acked-by: Ian Campbell --- Changes in v2: - Patch added --- xen/arch/arm/domain_build.c | 23 +++++++++++++---------- xen/arch/arm/time.c | 4 ++-- xen/arch/arm/vtimer.c | 4 ++-- xen/include/asm-arm/time.h | 4 ++-- 4 files changed, 19 insertions(+), 16 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 187e071..7bc9bf6 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -616,7 +616,7 @@ static int make_timer_node(const struct domain *d, void *fdt, u32 len; const void *compatible; int res; - const struct dt_irq *irq; + unsigned int irq; gic_interrupt_t intrs[3]; u32 clock_frequency; bool_t clock_valid; @@ -645,17 +645,20 @@ static int make_timer_node(const struct domain *d, void *fdt, if ( res ) return res; - irq = timer_dt_irq(TIMER_PHYS_SECURE_PPI); - DPRINT(" Secure interrupt %u\n", irq->irq); - set_interrupt_ppi(intrs[0], irq->irq, 0xf, irq->type); + /* The timer IRQ is emulated by Xen. It always exposes an active-low + * level-sensitive interrupt */ - irq = timer_dt_irq(TIMER_PHYS_NONSECURE_PPI); - DPRINT(" Non secure interrupt %u\n", irq->irq); - set_interrupt_ppi(intrs[1], irq->irq, 0xf, irq->type); + irq = timer_get_irq(TIMER_PHYS_SECURE_PPI); + DPRINT(" Secure interrupt %u\n", irq); + set_interrupt_ppi(intrs[0], irq, 0xf, DT_IRQ_TYPE_LEVEL_LOW); - irq = timer_dt_irq(TIMER_VIRT_PPI); - DPRINT(" Virt interrupt %u\n", irq->irq); - set_interrupt_ppi(intrs[2], irq->irq, 0xf, irq->type); + irq = timer_get_irq(TIMER_PHYS_NONSECURE_PPI); + DPRINT(" Non secure interrupt %u\n", irq); + set_interrupt_ppi(intrs[1], irq, 0xf, DT_IRQ_TYPE_LEVEL_LOW); + + irq = timer_get_irq(TIMER_VIRT_PPI); + DPRINT(" Virt interrupt %u\n", irq); + set_interrupt_ppi(intrs[2], irq, 0xf, DT_IRQ_TYPE_LEVEL_LOW); res = fdt_property_interrupts(fdt, intrs, 3); if ( res ) diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index 8dd4bea..7cad888 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -50,11 +50,11 @@ unsigned long __read_mostly cpu_khz; /* CPU clock frequency in kHz. */ static struct dt_irq timer_irq[MAX_TIMER_PPI]; -const struct dt_irq *timer_dt_irq(enum timer_ppi ppi) +unsigned int timer_get_irq(enum timer_ppi ppi) { ASSERT(ppi >= TIMER_PHYS_SECURE_PPI && ppi < MAX_TIMER_PPI); - return &timer_irq[ppi]; + return timer_irq[ppi].irq; } /*static inline*/ s_time_t ticks_to_ns(uint64_t ticks) diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index cb690bb..4822d4f 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -65,7 +65,7 @@ int vcpu_vtimer_init(struct vcpu *v) t->ctl = 0; t->cval = NOW(); t->irq = d0 - ? timer_dt_irq(TIMER_PHYS_NONSECURE_PPI)->irq + ? timer_get_irq(TIMER_PHYS_NONSECURE_PPI) : GUEST_TIMER_PHYS_NS_PPI; t->v = v; @@ -73,7 +73,7 @@ int vcpu_vtimer_init(struct vcpu *v) init_timer(&t->timer, virt_timer_expired, t, v->processor); t->ctl = 0; t->irq = d0 - ? timer_dt_irq(TIMER_VIRT_PPI)->irq + ? timer_get_irq(TIMER_VIRT_PPI) : GUEST_TIMER_VIRT_PPI; t->v = v; diff --git a/xen/include/asm-arm/time.h b/xen/include/asm-arm/time.h index d10c737..9bbab0b 100644 --- a/xen/include/asm-arm/time.h +++ b/xen/include/asm-arm/time.h @@ -22,8 +22,8 @@ enum timer_ppi MAX_TIMER_PPI = 4, }; -/* Get one of the timer IRQ description */ -const struct dt_irq* timer_dt_irq(enum timer_ppi ppi); +/* Get one of the timer IRQ number */ +unsigned int timer_get_irq(enum timer_ppi ppi); /* Route timer's IRQ on this CPU */ extern void __cpuinit route_timer_interrupt(void);