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[50.57.142.19]) by mx.google.com with ESMTPS id f33si1001391qgf.50.2014.04.08.08.22.47 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 08 Apr 2014 08:22:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WXXq0-0007k6-4f; Tue, 08 Apr 2014 15:21:24 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WXXpy-0007jr-SH for xen-devel@lists.xensource.com; Tue, 08 Apr 2014 15:21:23 +0000 Received: from [193.109.254.147:14404] by server-5.bemta-14.messagelabs.com id BB/99-26413-2F314435; Tue, 08 Apr 2014 15:21:22 +0000 X-Env-Sender: Stefano.Stabellini@citrix.com X-Msg-Ref: server-8.tower-27.messagelabs.com!1396970478!7046943!2 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n X-StarScan-Received: X-StarScan-Version: 6.11.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 1140 invoked from network); 8 Apr 2014 15:21:21 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-8.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 8 Apr 2014 15:21:21 -0000 X-IronPort-AV: E=Sophos;i="4.97,818,1389744000"; d="scan'208";a="117920547" Received: from accessns.citrite.net (HELO FTLPEX01CL03.citrite.net) ([10.9.154.239]) by FTLPIPO02.CITRIX.COM with ESMTP; 08 Apr 2014 15:21:21 +0000 Received: from ukmail1.uk.xensource.com (10.80.16.128) by smtprelay.citrix.com (10.13.107.80) with Microsoft SMTP Server id 14.2.342.4; Tue, 8 Apr 2014 11:21:20 -0400 Received: from kaball.uk.xensource.com ([10.80.2.59]) by ukmail1.uk.xensource.com with esmtp (Exim 4.69) (envelope-from ) id 1WXXhk-0005Ms-2Z; Tue, 08 Apr 2014 16:12:52 +0100 From: Stefano Stabellini To: Date: Tue, 8 Apr 2014 16:12:49 +0100 Message-ID: <1396969969-18973-12-git-send-email-stefano.stabellini@eu.citrix.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 X-DLP: MIA2 Cc: julien.grall@citrix.com, Ian.Campbell@citrix.com, stefano.stabellini@eu.citrix.com Subject: [Xen-devel] [PATCH v7 12/12] xen/arm: introduce GIC_PRI_TO_GUEST macro X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: stefano.stabellini@eu.citrix.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: GICH_LR registers and GICH_VMCR only support 5 bits for guest irq priorities. Introduce a macro to reduce the 8-bit priority fields to 5 bits; use it in gic.c. Signed-off-by: Stefano Stabellini Acked-by: Ian Campbell --- xen/arch/arm/gic.c | 6 +++--- xen/include/asm-arm/gic.h | 2 ++ 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 9295ccf..a4a1ddc 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -636,7 +636,7 @@ static inline void gic_set_lr(int lr, struct pending_irq *p, BUG_ON(lr < 0); BUG_ON(state & ~(GICH_LR_STATE_MASK<priority >> 3) << GICH_LR_PRIORITY_SHIFT) | + lr_reg = state | (GIC_PRI_TO_GUEST(p->priority) << GICH_LR_PRIORITY_SHIFT) | ((p->irq & GICH_LR_VIRTUAL_MASK) << GICH_LR_VIRTUAL_SHIFT); if ( p->desc != NULL ) lr_reg |= GICH_LR_HW | (p->desc->irq << GICH_LR_PHYSICAL_SHIFT); @@ -850,7 +850,7 @@ int gic_events_need_delivery(void) if ( p->priority < max_priority ) max_priority = p->priority; } - if ( (p->priority >> 3) >= mask_priority ) + if ( GIC_PRI_TO_GUEST(p->priority) >= mask_priority ) break; lrs--; if ( lrs == 0 ) @@ -860,7 +860,7 @@ int gic_events_need_delivery(void) spin_unlock_irqrestore(&v->arch.vgic.lock, flags); if ( max_priority < active_priority && - (max_priority >> 3) < mask_priority ) + GIC_PRI_TO_GUEST(max_priority) < mask_priority ) return 1; else return 0; diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 5d8f7f1..e3dae52 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -152,6 +152,8 @@ #define GIC_PRI_IRQ 0xa0 #define GIC_PRI_IPI 0x90 /* IPIs must preempt normal interrupts */ #define GIC_PRI_HIGHEST 0x80 /* Higher priorities belong to Secure-World */ +#define GIC_PRI_TO_GUEST(pri) (pri >> 3) /* GICH_LR and GICH_VMCR only support + 5 bits for guest irq prority */ #ifndef __ASSEMBLY__