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[50.57.142.19]) by mx.google.com with ESMTPS id c8si3819273qco.90.2014.03.17.07.54.35 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 17 Mar 2014 07:54:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WPYv7-00024C-2d; Mon, 17 Mar 2014 14:53:41 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WPYv1-0001xH-UB for xen-devel@lists.xen.org; Mon, 17 Mar 2014 14:53:36 +0000 Received: from [85.158.143.35:35055] by server-1.bemta-4.messagelabs.com id 1E/6B-09853-E6C07235; Mon, 17 Mar 2014 14:53:34 +0000 X-Env-Sender: Ian.Campbell@citrix.com X-Msg-Ref: server-9.tower-21.messagelabs.com!1395068011!2629860!3 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n X-StarScan-Received: X-StarScan-Version: 6.11.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 22141 invoked from network); 17 Mar 2014 14:53:34 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-9.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 17 Mar 2014 14:53:34 -0000 X-IronPort-AV: E=Sophos;i="4.97,670,1389744000"; d="scan'208";a="112135719" Received: from accessns.citrite.net (HELO FTLPEX01CL02.citrite.net) ([10.9.154.239]) by FTLPIPO01.CITRIX.COM with ESMTP; 17 Mar 2014 14:53:32 +0000 Received: from norwich.cam.xci-test.com (10.80.248.129) by smtprelay.citrix.com (10.13.107.79) with Microsoft SMTP Server id 14.2.342.4; Mon, 17 Mar 2014 10:53:31 -0400 Received: from drall.uk.xensource.com ([10.80.16.71] helo=drall.uk.xensource.com.) by norwich.cam.xci-test.com with esmtp (Exim 4.72) (envelope-from ) id 1WPYux-00012w-1k; Mon, 17 Mar 2014 14:53:31 +0000 From: Ian Campbell To: Date: Mon, 17 Mar 2014 14:53:30 +0000 Message-ID: <1395068010-23344-8-git-send-email-ian.campbell@citrix.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1395067981.18221.35.camel@kazak.uk.xensource.com> References: <1395067981.18221.35.camel@kazak.uk.xensource.com> MIME-Version: 1.0 X-DLP: MIA1 Cc: julien.grall@linaro.org, tim@xen.org, Ian Campbell , stefano.stabellini@eu.citrix.com Subject: [Xen-devel] [PATCH=v3 8/8] xen: arm: use more specific barriers for read and write barriers. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ian.campbell@citrix.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Note that 32-bit does not provide a load variant of the inner shareable barrier, so that remains a full any-any barrier. Signed-off-by: Ian Campbell Acked-by: Stefano Stabellini Acked-by: Tim Deegan --- xen/include/asm-arm/system.h | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/xen/include/asm-arm/system.h b/xen/include/asm-arm/system.h index 32ed277..7aaaf50 100644 --- a/xen/include/asm-arm/system.h +++ b/xen/include/asm-arm/system.h @@ -17,12 +17,21 @@ #define dmb(scope) asm volatile("dmb " #scope : : : "memory") #define mb() dsb(sy) -#define rmb() dsb(sy) -#define wmb() dsb(sy) +#ifdef CONFIG_ARM_64 +#define rmb() dsb(ld) +#else +#define rmb() dsb(sy) /* 32-bit has no ld variant. */ +#endif +#define wmb() dsb(st) #define smp_mb() dmb(ish) -#define smp_rmb() dmb(ish) -#define smp_wmb() dmb(ish) +#ifdef CONFIG_ARM_64 +#define smp_rmb() dmb(ishld) +#else +#define smp_rmb() dmb(ish) /* 32-bit has no ishld variant. */ +#endif + +#define smp_wmb() dmb(ishst) #define xchg(ptr,x) \ ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))