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[50.57.142.19]) by mx.google.com with ESMTPS id 75si1044712qgv.97.2014.02.13.04.39.59 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 13 Feb 2014 04:40:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WDvYi-00027q-3I; Thu, 13 Feb 2014 12:38:28 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WDvYh-00026N-04 for xen-devel@lists.xen.org; Thu, 13 Feb 2014 12:38:27 +0000 Received: from [193.109.254.147:6135] by server-13.bemta-14.messagelabs.com id CC/0B-01226-2CCBCF25; Thu, 13 Feb 2014 12:38:26 +0000 X-Env-Sender: Ian.Campbell@citrix.com X-Msg-Ref: server-2.tower-27.messagelabs.com!1392295104!4060571!1 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n X-StarScan-Received: X-StarScan-Version: 6.9.16; banners=-,-,- X-VirusChecked: Checked Received: (qmail 2992 invoked from network); 13 Feb 2014 12:38:25 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-2.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 13 Feb 2014 12:38:25 -0000 X-IronPort-AV: E=Sophos;i="4.95,838,1384300800"; d="scan'208";a="100426779" Received: from accessns.citrite.net (HELO FTLPEX01CL03.citrite.net) ([10.9.154.239]) by FTLPIPO02.CITRIX.COM with ESMTP; 13 Feb 2014 12:38:10 +0000 Received: from norwich.cam.xci-test.com (10.80.248.129) by smtprelay.citrix.com (10.13.107.80) with Microsoft SMTP Server id 14.2.342.4; Thu, 13 Feb 2014 07:38:09 -0500 Received: from drall.uk.xensource.com ([10.80.16.71] helo=drall.uk.xensource.com.) by norwich.cam.xci-test.com with esmtp (Exim 4.72) (envelope-from ) id 1WDvYP-0003Bw-Cb; Thu, 13 Feb 2014 12:38:09 +0000 From: Ian Campbell To: Date: Thu, 13 Feb 2014 12:38:08 +0000 Message-ID: <1392295088-24219-8-git-send-email-ian.campbell@citrix.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1392295040.31985.7.camel@kazak.uk.xensource.com> References: <1392295040.31985.7.camel@kazak.uk.xensource.com> MIME-Version: 1.0 X-DLP: MIA2 Cc: julien.grall@linaro.org, tim@xen.org, Ian Campbell , stefano.stabellini@eu.citrix.com Subject: [Xen-devel] [PATCH for-4.5 v2 8/8] xen: arm: use more specific barriers for read and write barriers. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ian.campbell@citrix.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Note that 32-bit does not provide a load variant of the inner shareable barrier, so that remains a full any-any barrier. Signed-off-by: Ian Campbell Acked-by: Stefano Stabellini Acked-by: Tim Deegan --- xen/include/asm-arm/system.h | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/xen/include/asm-arm/system.h b/xen/include/asm-arm/system.h index 32ed277..7aaaf50 100644 --- a/xen/include/asm-arm/system.h +++ b/xen/include/asm-arm/system.h @@ -17,12 +17,21 @@ #define dmb(scope) asm volatile("dmb " #scope : : : "memory") #define mb() dsb(sy) -#define rmb() dsb(sy) -#define wmb() dsb(sy) +#ifdef CONFIG_ARM_64 +#define rmb() dsb(ld) +#else +#define rmb() dsb(sy) /* 32-bit has no ld variant. */ +#endif +#define wmb() dsb(st) #define smp_mb() dmb(ish) -#define smp_rmb() dmb(ish) -#define smp_wmb() dmb(ish) +#ifdef CONFIG_ARM_64 +#define smp_rmb() dmb(ishld) +#else +#define smp_rmb() dmb(ish) /* 32-bit has no ishld variant. */ +#endif + +#define smp_wmb() dmb(ishst) #define xchg(ptr,x) \ ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))