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[92.224.192.75]) by mx.google.com with ESMTPSA id xm9sm28206859bkb.1.2013.12.05.02.08.43 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 Dec 2013 02:08:44 -0800 (PST) From: Andre Przywara To: Ian.Campbell@citrix.com, stefano.stabellini@eu.citrix.com Cc: julien.grall@linaro.org, George.Dunlap@eu.citrix.com, xen-devel@lists.xenproject.org, patches@linaro.org, Andre Przywara Subject: [PATCH v3 4/6] arm: add a function to invoke the PSCI handler Date: Thu, 5 Dec 2013 11:08:10 +0100 Message-Id: <1386238092-22216-5-git-send-email-andre.przywara@linaro.org> X-Mailer: git-send-email 1.7.12.1 In-Reply-To: <1386238092-22216-1-git-send-email-andre.przywara@linaro.org> References: <1386238092-22216-1-git-send-email-andre.przywara@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: andre.przywara@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.170 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The PSCI handler is invoked via a secure monitor call with the arguments defined in registers. Copy the function from the Linux code and adjust it to work on both ARM32 and ARM64. Signed-off-by: Andre Przywara --- xen/arch/arm/psci.c | 30 ++++++++++++++++++++++++++++++ xen/include/asm-arm/psci.h | 1 + 2 files changed, 31 insertions(+) diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index efb514e..25a8697 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -25,8 +25,38 @@ bool_t psci_available; +#ifdef CONFIG_ARM_32 +#define REG_PREFIX "r" +#else +#define REG_PREFIX "x" +#endif + +static noinline int __invoke_psci_fn_smc(register_t function_id, + register_t arg0, + register_t arg1, + register_t arg2) +{ + asm volatile( + __asmeq("%0", REG_PREFIX"0") + __asmeq("%1", REG_PREFIX"1") + __asmeq("%2", REG_PREFIX"2") + __asmeq("%3", REG_PREFIX"3") + "smc #0" + : "+r" (function_id) + : "r" (arg0), "r" (arg1), "r" (arg2)); + + return function_id; +} + +#undef REG_PREFIX + static uint32_t psci_cpu_on_nr; +int call_psci_cpu_on(int cpu) +{ + return __invoke_psci_fn_smc(psci_cpu_on_nr, cpu, __pa(init_secondary), 0); +} + int __init psci_init(void) { const struct dt_device_node *psci; diff --git a/xen/include/asm-arm/psci.h b/xen/include/asm-arm/psci.h index 36ce87d..189964b 100644 --- a/xen/include/asm-arm/psci.h +++ b/xen/include/asm-arm/psci.h @@ -10,6 +10,7 @@ extern bool_t psci_available; int psci_init(void); +int call_psci_cpu_on(int cpu); /* functions to handle guest PSCI requests */ int do_psci_cpu_on(uint32_t vcpuid, register_t entry_point);