From patchwork Tue Dec 3 12:03:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: PranavkumarSawargaonkar X-Patchwork-Id: 21958 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f72.google.com (mail-oa0-f72.google.com [209.85.219.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 01DE8202AE for ; Tue, 3 Dec 2013 12:04:23 +0000 (UTC) Received: by mail-oa0-f72.google.com with SMTP id o6sf47306333oag.7 for ; Tue, 03 Dec 2013 04:04:23 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=jfVrVR1YK+4EJl+2Vp4KtsuHpYTbZO786XLR8R/0mRw=; b=LL/r0NzCNlrW+qtXteGgJVK0PgNGoB0mN7g8XeP+tt+X2DOGTRPg+4qQYCj1D6dvsw VUMHPOc51GGIa33im131q2ntYTBeXF+AdUIe3GHvuzX0qUr/xd40feRv1ngg6fmb7lE8 phnO2vvhAZByOyKcFVDgNuHwBYVsqPTuXGmDRbPolbH9x7XmQdFcm3dSaS9KrDTXiJ8y bA8stQ9R2Z8KoPVPNx5zq1HCFu6fvgkpZuP3e3rlNkBvHczLqA0MioijLiTCwvjEgyav yR1WJsUIIfQIpYriAd7cNXVk6idOCuWINGKCEcn/jDTYZm+TKhb6d0TmBegtatf8ODUt xiUg== X-Gm-Message-State: ALoCoQmrrfY4MDrAdmfLOOe5r5Esr4s1cK2/pi7vt9c4fzC9vN15ePrbu5pMpGPDI8ClYuQOweSM X-Received: by 10.50.117.3 with SMTP id ka3mr869338igb.7.1386072263563; Tue, 03 Dec 2013 04:04:23 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.49.70 with SMTP id s6ls3154519qen.34.gmail; Tue, 03 Dec 2013 04:04:23 -0800 (PST) X-Received: by 10.220.209.202 with SMTP id gh10mr25469vcb.50.1386072263482; Tue, 03 Dec 2013 04:04:23 -0800 (PST) Received: from mail-vc0-f180.google.com (mail-vc0-f180.google.com [209.85.220.180]) by mx.google.com with ESMTPS id x1si2688220vdo.29.2013.12.03.04.04.23 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Dec 2013 04:04:23 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.180; Received: by mail-vc0-f180.google.com with SMTP id if17so9368931vcb.25 for ; Tue, 03 Dec 2013 04:04:23 -0800 (PST) X-Received: by 10.58.75.164 with SMTP id d4mr107223vew.53.1386072263265; Tue, 03 Dec 2013 04:04:23 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp201787vcz; Tue, 3 Dec 2013 04:04:22 -0800 (PST) X-Received: by 10.68.191.3 with SMTP id gu3mr14501177pbc.142.1386072262493; Tue, 03 Dec 2013 04:04:22 -0800 (PST) Received: from mail-pa0-f45.google.com (mail-pa0-f45.google.com [209.85.220.45]) by mx.google.com with ESMTPS id bo6si28849986pab.259.2013.12.03.04.04.22 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Dec 2013 04:04:22 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.45 is neither permitted nor denied by best guess record for domain of pranavkumar@linaro.org) client-ip=209.85.220.45; Received: by mail-pa0-f45.google.com with SMTP id fb1so2860580pad.4 for ; Tue, 03 Dec 2013 04:04:22 -0800 (PST) X-Received: by 10.66.250.129 with SMTP id zc1mr10342345pac.153.1386072262034; Tue, 03 Dec 2013 04:04:22 -0800 (PST) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id wp8sm129609924pbc.26.2013.12.03.04.04.17 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Dec 2013 04:04:21 -0800 (PST) From: Pranavkumar Sawargaonkar To: xen-devel@lists.xen.org Cc: patches@apm.com, ian.campbell@citrix.com, stefano.stabellini@citrix.com, julien.grall@citrix.com, patches@linaro.org, Pranavkumar Sawargaonkar , Anup Patel Subject: [PATCH] xen: arm: Fixing ttbcr (TCR_EL1 for AArch64) size. Date: Tue, 3 Dec 2013 17:33:44 +0530 Message-Id: <1386072224-4478-1-git-send-email-pranavkumar@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: pranavkumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch fixes size of ttbcr register (TCR_EL1 in case of AArch64) and it's programming considering size in case of context switch. Currently ttbcr is defined as 32b register but for AArch64 TCR_EL1 size is 64b. Signed-off-by: Anup Patel Signed-off-by: Pranavkumar Sawargaonkar --- xen/arch/arm/domain.c | 8 ++++++++ xen/include/asm-arm/domain.h | 4 ++++ 2 files changed, 12 insertions(+) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 52d2403..74ab046 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -89,7 +89,11 @@ static void ctxt_switch_from(struct vcpu *p) /* MMU */ p->arch.vbar = READ_SYSREG(VBAR_EL1); +#ifdef CONFIG_ARM_32 p->arch.ttbcr = READ_SYSREG(TCR_EL1); +#else + p->arch.ttbcr = READ_SYSREG64(TCR_EL1); +#endif p->arch.ttbr0 = READ_SYSREG64(TTBR0_EL1); p->arch.ttbr1 = READ_SYSREG64(TTBR1_EL1); if ( is_pv32_domain(p->domain) ) @@ -168,7 +172,11 @@ static void ctxt_switch_to(struct vcpu *n) /* MMU */ WRITE_SYSREG(n->arch.vbar, VBAR_EL1); +#if defined(CONFIG_ARM_32) WRITE_SYSREG(n->arch.ttbcr, TCR_EL1); +#else + WRITE_SYSREG64(n->arch.ttbcr, TCR_EL1); +#endif WRITE_SYSREG64(n->arch.ttbr0, TTBR0_EL1); WRITE_SYSREG64(n->arch.ttbr1, TTBR1_EL1); if ( is_pv32_domain(n->domain) ) diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h index d5cae2e..2aa4443 100644 --- a/xen/include/asm-arm/domain.h +++ b/xen/include/asm-arm/domain.h @@ -165,7 +165,11 @@ struct arch_vcpu /* MMU */ register_t vbar; +#ifdef CONFIG_ARM_32 uint32_t ttbcr; +#else + uint64_t ttbcr; +#endif uint64_t ttbr0, ttbr1; uint32_t dacr; /* 32-bit guests only */