From patchwork Wed Feb 20 07:28:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 158787 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4603867jaa; Tue, 19 Feb 2019 23:30:54 -0800 (PST) X-Google-Smtp-Source: AHgI3IaNkFEYv9eMPSK7JAfi8CsWMb6omsnwAqujI6XbW51R1jvLeYaa6C+LxvQdiNGQr/VNG75N X-Received: by 2002:ac8:34ae:: with SMTP id w43mr5664235qtb.145.1550647854202; Tue, 19 Feb 2019 23:30:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550647854; cv=none; d=google.com; s=arc-20160816; b=WBDNam6M3+Srq8Z3RNJ+/e+YgAVIKZ7vtKthNClHnHJHmEKjOQ7Aod2fs6X4fa/abC TvgFmqqzhw2bIgAqdymmLlRnLum3mDmjlQ69t8OYM2M7j4TGqnXjX6Qrb1nLX8s7Btjb X8pag9zpFJNcUv/0n42jhW2M9Kox0A1wXyzZP6FlpaZP7oA9sZhArh6Rx2sqc/v9UqZz xYXbaCPSs+208+TZtyC7T/EX6I46Y8j6OnoZqG3uVYMzLcrBWyKn1paaPZO4BjBQeC7i ThGZsNKru5LiRGbE6Bi0s/Whtygn8EgA5LwIOldL0HuVIvK7wlbbQq2HsyE7Q+zxEQNC IWEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to; bh=LV4fOGeMunk57D0rpmYnE0JSbZNZJ57pQgmSaQ2OsMc=; b=UHS+sfWNM8m1QliYGfOuWXvt8NmpCMxxu0j3JP7W8xbWjTQSIDTBbqvzeSeIXdQpyg FnRxSSwuOdXrrSOdQnslpUlO+tZ6XRsXghYOVpik4oV/Ien0hgEATUah6+yUyy0CO7GE E67HTY918QE7UivmGsASnLC/l3z3YqFmLUv0DVZtt+yk+jGSOgESxAJ0UONDUYd83aCG OeX7ydk1ycdZ6WBiJTw/OqeASAaViq7AD4k/ZBkKrJ0C1OHxrVM+NbYN73dgLsEMsDQf 2Tt0GnJDIQv1BBiiqJlZKVN0ZM2jQs4f3iGO8QrPDVoQ7ab0laso5hZZq8EVgdKY16WO Ajnw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id q49si1978211qtj.90.2019.02.19.23.30.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:30:54 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id C70F56199E; Wed, 20 Feb 2019 07:30:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id F0C0361936; Wed, 20 Feb 2019 07:29:52 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 5314761973; Wed, 20 Feb 2019 07:29:48 +0000 (UTC) Received: from mail-pf1-f196.google.com (mail-pf1-f196.google.com [209.85.210.196]) by lists.linaro.org (Postfix) with ESMTPS id A2CF361936 for ; Wed, 20 Feb 2019 07:29:01 +0000 (UTC) Received: by mail-pf1-f196.google.com with SMTP id h1so11478234pfo.7 for ; Tue, 19 Feb 2019 23:29:01 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MRbvcU1OuLk38U6fCDZjzxsbaCDVrdkPV7fJkZKzkjo=; b=IytG5ksKchBEHC+PMnGMJp1BqYhWGPEcDQ4WV6r/JUiqCjD3xtPRDJ4ZzfJCGR9aoP aMOd5B9ibBcoHjTC5A/BcMFeYPVLnaNZOdd1X4huDNFEdxAw+8xzqKekFurrWUg3fB51 Dh5xGHGF5OlBidgBJq2WeuaECQ0c2lP+ofiRTT5JdGbXU+hQUVWiJ8MvI4bXwtlFOXTa l8XcacjmDPd2bq7TaeyI1A9LJqtAd7dVx0+Gjhi1NrWKsOmmWAAVW35LHQLjxFkeoAae EzDotZkgPN8W+eYBrYh+mcc+EYZvNIJoaHdlUG1cAVCsdqmJ1WJR3Uir7o8aKcQOitqf Jz3A== X-Gm-Message-State: AHQUAua9xmrvCfC/jNymEum9Ht4C02asoeOGun2Wp6UqE7LPRpypXiVu PPsj+dcrZaSBrblJQ9larKFXlTjd X-Received: by 2002:a63:7044:: with SMTP id a4mr27411002pgn.359.1550647740935; Tue, 19 Feb 2019 23:29:00 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.28.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:00 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:24 +0800 Message-Id: <20190220072837.35058-6-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 05/18] Hisilicon/D06: Add more PCIe port INT-x support X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Since NVMe riser width is 6*X4, need add the related port's INT-x support to match OS driver. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 37 +++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 0f2d11bb952b..4d9d9d95be68 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -41,11 +41,21 @@ Scope(_SB) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added + Package () {0x2FFFF,0,0,640}, // INT_A + Package () {0x2FFFF,1,0,641}, // INT_B + Package () {0x2FFFF,2,0,642}, // INT_C + Package () {0x2FFFF,3,0,643}, // INT_D + Package () {0x4FFFF,0,0,640}, // INT_A Package () {0x4FFFF,1,0,641}, // INT_B Package () {0x4FFFF,2,0,642}, // INT_C Package () {0x4FFFF,3,0,643}, // INT_D + Package () {0x6FFFF,0,0,640}, // INT_A + Package () {0x6FFFF,1,0,641}, // INT_B + Package () {0x6FFFF,2,0,642}, // INT_C + Package () {0x6FFFF,3,0,643}, // INT_D + Package () {0x8FFFF,0,0,640}, // INT_A Package () {0x8FFFF,1,0,641}, // INT_B Package () {0x8FFFF,2,0,642}, // INT_C @@ -56,6 +66,11 @@ Scope(_SB) Package () {0xCFFFF,2,0,642}, // INT_C Package () {0xCFFFF,3,0,643}, // INT_D + Package () {0xEFFFF,0,0,640}, // INT_A + Package () {0xEFFFF,1,0,641}, // INT_B + Package () {0xEFFFF,2,0,642}, // INT_C + Package () {0xEFFFF,3,0,643}, // INT_D + Package () {0x10FFFF,0,0,640}, // INT_A Package () {0x10FFFF,1,0,641}, // INT_B Package () {0x10FFFF,2,0,642}, // INT_C @@ -759,11 +774,21 @@ Device (PCI6) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added + Package () {0x2FFFF,0,0,640}, // INT_A + Package () {0x2FFFF,1,0,641}, // INT_B + Package () {0x2FFFF,2,0,642}, // INT_C + Package () {0x2FFFF,3,0,643}, // INT_D + Package () {0x4FFFF,0,0,640}, // INT_A Package () {0x4FFFF,1,0,641}, // INT_B Package () {0x4FFFF,2,0,642}, // INT_C Package () {0x4FFFF,3,0,643}, // INT_D + Package () {0x6FFFF,0,0,640}, // INT_A + Package () {0x6FFFF,1,0,641}, // INT_B + Package () {0x6FFFF,2,0,642}, // INT_C + Package () {0x6FFFF,3,0,643}, // INT_D + Package () {0x8FFFF,0,0,640}, // INT_A Package () {0x8FFFF,1,0,641}, // INT_B Package () {0x8FFFF,2,0,642}, // INT_C @@ -774,11 +799,21 @@ Device (PCI6) Package () {0xCFFFF,2,0,642}, // INT_C Package () {0xCFFFF,3,0,643}, // INT_D + Package () {0xEFFFF,0,0,640}, // INT_A + Package () {0xEFFFF,1,0,641}, // INT_B + Package () {0xEFFFF,2,0,642}, // INT_C + Package () {0xEFFFF,3,0,643}, // INT_D + Package () {0x10FFFF,0,0,640}, // INT_A Package () {0x10FFFF,1,0,641}, // INT_B Package () {0x10FFFF,2,0,642}, // INT_C Package () {0x10FFFF,3,0,643}, // INT_D - }) + + Package () {0x12FFFF,0,0,640}, // INT_A + Package () {0x12FFFF,1,0,641}, // INT_B + Package () {0x12FFFF,2,0,642}, // INT_C + Package () {0x12FFFF,3,0,643}, // INT_D + }) Method (_CRS, 0, Serialized) { // Root complex resources, _CRS: current resource setting Name (RBUF, ResourceTemplate () { // Name: 19.6.87, ResourceTemplate: 19.6.111,