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[54.225.227.206]) by mx.google.com with ESMTP id e70si14245730qkh.139.2016.12.07.04.06.04; Wed, 07 Dec 2016 04:06:04 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 5DF7360E51; Wed, 7 Dec 2016 12:06:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2 autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id A113C62EB0; Wed, 7 Dec 2016 11:55:26 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 3FB0760E51; Wed, 7 Dec 2016 11:54:24 +0000 (UTC) Received: from mail-pg0-f43.google.com (mail-pg0-f43.google.com [74.125.83.43]) by lists.linaro.org (Postfix) with ESMTPS id E38F060EB5 for ; Wed, 7 Dec 2016 11:52:25 +0000 (UTC) Received: by mail-pg0-f43.google.com with SMTP id 3so161443053pgd.0 for ; Wed, 07 Dec 2016 03:52:25 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=t5SrwFOhBKUyF2C7smeoFbHsCp1SjnHwJLegYDufqVc=; b=N9MZLONv3EnCk4VxqhvJmGx/7DlmuAVrFvnfN0oAwg5zccgzpn7YPcaxuKZYByvX4G McnrE20ugjOw1LQqQYxrpKwixL2iI58ISP2xCLi8KxsbUEaQxIUGnPraYSA1PMAkj0d7 flcgmJPFa5rIRab2+Q8hNomWQ0Vt7hYdBfOSk4sfphlcHKHI/hIBNo/Nao0BwJ0TO1H3 +duwR9dAeq/EobrKadM0+aygbyrGkEsBRLh2RttN0ZVCnDD2LtGcU+J21N2gETWV5t+c Rs2W5Cne/ivCTVzZpTYPH4egTFXWPhWb2osOGHs895JGU8scsXBegK4ncrOOwCPu8ZN1 CNoQ== X-Gm-Message-State: AKaTC02kqhIG22TWgFFU2R+DtSAswh36X/C8TyKX7wPUONoSwW0zFfB9OpAXOo406FGQkwATZGY= X-Received: by 10.84.175.234 with SMTP id t97mr146399733plb.145.1481111545243; Wed, 07 Dec 2016 03:52:25 -0800 (PST) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id y20sm42169141pfj.26.2016.12.07.03.52.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 07 Dec 2016 03:52:24 -0800 (PST) From: Heyi Guo To: linaro-uefi@lists.linaro.org Date: Wed, 7 Dec 2016 19:49:21 +0800 Message-Id: <1481111375-71058-25-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481111375-71058-1-git-send-email-heyi.guo@linaro.org> References: <1481111375-71058-1-git-send-email-heyi.guo@linaro.org> Cc: sunchenhui@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v7 24/38] Hisilicon/SMBIOS: Update ProcessorID from MIDR X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" There is no register restore processor id at ARM Platform,we talked with ARM Charles and made a agreement that we can use MIDR instead,maybe there will be a specific register to read the processor id in future. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo Reviewed-by: Charles Garcia-Tobin Reviewed-by: Leif Lindholm --- .../Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c index 07dae5f..005d28f 100644 --- a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c +++ b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c @@ -490,6 +490,7 @@ AddSmbiosProcessorTypeTable ( CHAR16 *CpuVersion; STRING_REF TokenToUpdate; + UINT64 *ProcessorId; Type4Record = NULL; ProcessorManuStr = NULL; ProcessorVersionStr = NULL; @@ -614,6 +615,8 @@ AddSmbiosProcessorTypeTable ( Type4Record->ProcessorCharacteristics = ProcessorCharacteristics.Data; Type4Record->ExternalClock = (UINT16)(ArmReadCntFrq() / 1000 / 1000); + ProcessorId = (UINT64 *)&(Type4Record->ProcessorId); + *ProcessorId = ArmReadMidr(); OptionalStrStart = (CHAR8 *) (Type4Record + 1); UnicodeStrToAsciiStr (ProcessorSocketStr, OptionalStrStart);