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[54.225.227.206]) by mx.google.com with ESMTP id 86si11619528qkx.336.2016.12.06.05.10.26; Tue, 06 Dec 2016 05:10:26 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 829836098D; Tue, 6 Dec 2016 13:10:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id ACB0362C62; Tue, 6 Dec 2016 13:07:22 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 75F98609A4; Tue, 6 Dec 2016 13:06:57 +0000 (UTC) Received: from mail-wm0-f46.google.com (mail-wm0-f46.google.com [74.125.82.46]) by lists.linaro.org (Postfix) with ESMTPS id DB03760920 for ; Tue, 6 Dec 2016 13:05:56 +0000 (UTC) Received: by mail-wm0-f46.google.com with SMTP id f82so125049459wmf.1 for ; Tue, 06 Dec 2016 05:05:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=frMnx7RjhRvqZUjScU0byv7AAuD1lmaIXJdF8VKhHvg=; b=Dy1QQm6kxQgfMEHbYdrIcH87t7FBEIfmOaIDYfzyCBaInXQckQquZr3mQ5i7tI7Yrk wexkgT30qHAajU9f2DX6oDgcKuRvcoh5ZE7rLEoq7UkHisw+/mAaP6IJd0cH8OlAY+Yz 7UdoSUg5yw+tJOgLDxeK4vPRT5zXOZ30aMwM9vyzR1pr40yHkXRrQWRUbVgTIDWWcK1V 3ym/eG8WrJz63yxmcZCUSJzYEXb/hC5CleiuH3hA37gQGsLtw/OLEaOzttpipYwTt9o+ vtBRLVirOtSODMue9xdCZ3A0+zANibEiISidXH7kS5WwTsdZP6Gk3eOsfrbEECXnZEX3 JEhg== X-Gm-Message-State: AKaTC02V7o6luoyXjkw6ig5I5heL+aG8G9jKCMTi0OH6TtxqK6Ep3w54NR35ecXMsTzAodRenrY= X-Received: by 10.28.10.147 with SMTP id 141mr2530260wmk.65.1481029555865; Tue, 06 Dec 2016 05:05:55 -0800 (PST) Received: from localhost.localdomain ([105.144.52.243]) by smtp.gmail.com with ESMTPSA id i2sm25673450wjx.44.2016.12.06.05.05.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 06 Dec 2016 05:05:55 -0800 (PST) From: Ard Biesheuvel To: linaro-uefi@lists.linaro.org Date: Tue, 6 Dec 2016 13:05:32 +0000 Message-Id: <1481029532-17057-9-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1481029532-17057-1-git-send-email-ard.biesheuvel@linaro.org> References: <1481029532-17057-1-git-send-email-ard.biesheuvel@linaro.org> Cc: alan@softiron.co.uk Subject: [Linaro-uefi] [PATCH v3 8/8] Platforms/AMD/Styx: rename SATA PCDs for symmetry X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" To match the port 1 counterparts, rename PcdSataCtrlAxiSlvPort to PcdSata0CtrlAxiSlvPort and PcdSataPortCount to PcdSata0PortCount. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/AMD/Styx/AmdStyx.dec | 4 ++-- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 2 +- Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c | 11 ++++++----- Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/StyxSataPlatformDxe.inf | 8 ++++---- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 2 +- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 2 +- 6 files changed, 15 insertions(+), 14 deletions(-) diff --git a/Platforms/AMD/Styx/AmdStyx.dec b/Platforms/AMD/Styx/AmdStyx.dec index 3466d1e3cd61..6624f8ca74a7 100644 --- a/Platforms/AMD/Styx/AmdStyx.dec +++ b/Platforms/AMD/Styx/AmdStyx.dec @@ -50,8 +50,8 @@ gAmdStyxTokenSpaceGuid.PcdStyxFdt|{ 0xe4, 0x08, 0x0d, 0x04, 0x9a, 0x47, 0x4b, 0x42, 0x8c, 0x42, 0x36, 0x64, 0xdf, 0x79, 0x3f, 0x4b }|VOID*|0x00010000 # Synopsys SATA Controller - gAmdStyxTokenSpaceGuid.PcdSataCtrlAxiSlvPort|0xE0300000|UINT32|0x00020000 - gAmdStyxTokenSpaceGuid.PcdSataPortCount|8|UINT8|0x00020001 + gAmdStyxTokenSpaceGuid.PcdSata0CtrlAxiSlvPort|0xE0300000|UINT32|0x00020000 + gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8|UINT8|0x00020001 gAmdStyxTokenSpaceGuid.PcdSataPi|0xFF|UINT32|0x00020002 gAmdStyxTokenSpaceGuid.PcdSataPortMode|0|UINT16|0x00020003 gAmdStyxTokenSpaceGuid.PcdSataPortMpsp|TRUE|BOOLEAN|0x00020004 diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 0e97cb6f97b1..2606a0b6a552 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -405,7 +405,7 @@ DEFINE DO_KCS = 0 # # Cello has 2 SATA ports on the first controller. # - gAmdStyxTokenSpaceGuid.PcdSataPortCount|2 + gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 # PCIe Support diff --git a/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c b/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c index e199202d677e..5c651ed5246d 100644 --- a/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c +++ b/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c @@ -152,19 +152,19 @@ StyxSataPlatformDxeEntryPoint ( // // Perform SATA workarounds // - for (PortNum = 0; PortNum < FixedPcdGet8(PcdSataPortCount); PortNum++) { + for (PortNum = 0; PortNum < FixedPcdGet8(PcdSata0PortCount); PortNum++) { SetCwMinSata0 (PortNum); } - Status = InitializeSataController (FixedPcdGet32(PcdSataCtrlAxiSlvPort), - FixedPcdGet8(PcdSataPortCount), 0); + Status = InitializeSataController (FixedPcdGet32(PcdSata0CtrlAxiSlvPort), + FixedPcdGet8(PcdSata0PortCount), 0); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_WARN, "%a: failed to initialize primary SATA controller!\n", __FUNCTION__)); return Status; } - for (PortNum = 0; PortNum < FixedPcdGet8(PcdSataPortCount); PortNum++) { + for (PortNum = 0; PortNum < FixedPcdGet8(PcdSata0PortCount); PortNum++) { SetPrdSingleSata0 (PortNum); } @@ -174,7 +174,8 @@ StyxSataPlatformDxeEntryPoint ( } Status = InitializeSataController (FixedPcdGet32(PcdSata1CtrlAxiSlvPort), - FixedPcdGet8(PcdSata1PortCount), FixedPcdGet8(PcdSataPortCount)); + FixedPcdGet8(PcdSata1PortCount), + FixedPcdGet8(PcdSata0PortCount)); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_WARN, "%a: failed to initialize secondary SATA controller!\n", __FUNCTION__)); diff --git a/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/StyxSataPlatformDxe.inf b/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/StyxSataPlatformDxe.inf index e6f112adac69..b478fa5d037f 100644 --- a/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/StyxSataPlatformDxe.inf +++ b/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/StyxSataPlatformDxe.inf @@ -46,15 +46,15 @@ gAmdModulePkgTokenSpaceGuid.PcdSataSerdesOffset gAmdModulePkgTokenSpaceGuid.PcdSataNumChPerSerdes - gAmdStyxTokenSpaceGuid.PcdSataCtrlAxiSlvPort - gAmdStyxTokenSpaceGuid.PcdSataPortCount + gAmdStyxTokenSpaceGuid.PcdSata0CtrlAxiSlvPort + gAmdStyxTokenSpaceGuid.PcdSata0PortCount + gAmdStyxTokenSpaceGuid.PcdSata1CtrlAxiSlvPort + gAmdStyxTokenSpaceGuid.PcdSata1PortCount gAmdStyxTokenSpaceGuid.PcdSataPortMode gAmdStyxTokenSpaceGuid.PcdSataSmpsSupport gAmdStyxTokenSpaceGuid.PcdSataSssSupport gAmdStyxTokenSpaceGuid.PcdSataPortCpd gAmdStyxTokenSpaceGuid.PcdSataPortMpsp - gAmdStyxTokenSpaceGuid.PcdSata1CtrlAxiSlvPort - gAmdStyxTokenSpaceGuid.PcdSata1PortCount [Depex] TRUE diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index e093c62f9716..4f90f942b093 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -410,7 +410,7 @@ DEFINE DO_KCS = 1 # # 2 ports active on Overdrive 1000 # - gAmdStyxTokenSpaceGuid.PcdSataPortCount|2 + gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 # PCIe Support diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index bd91831ce71f..c7bf241fdc99 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -412,7 +412,7 @@ DEFINE DO_KCS = 1 # # Overdrive B1 has 14 SATA ports across 2 controllers. # - gAmdStyxTokenSpaceGuid.PcdSataPortCount|8 + gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|6 # PCIe Support