From patchwork Fri Dec 2 04:13:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 86224 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp90242qgi; Thu, 1 Dec 2016 20:38:23 -0800 (PST) X-Received: by 10.237.33.212 with SMTP id m20mr40192628qtc.130.1480653503119; Thu, 01 Dec 2016 20:38:23 -0800 (PST) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id j26si2042446qta.114.2016.12.01.20.38.22; Thu, 01 Dec 2016 20:38:23 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id CAE3960E8A; Fri, 2 Dec 2016 04:38:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2 autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 406D363488; Fri, 2 Dec 2016 04:22:22 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id C465D60EE4; Fri, 2 Dec 2016 04:21:50 +0000 (UTC) Received: from mail-pg0-f48.google.com (mail-pg0-f48.google.com [74.125.83.48]) by lists.linaro.org (Postfix) with ESMTPS id 5285D62F03 for ; Fri, 2 Dec 2016 04:16:03 +0000 (UTC) Received: by mail-pg0-f48.google.com with SMTP id 3so102749268pgd.0 for ; Thu, 01 Dec 2016 20:16:03 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HIU2I62Jx87iWccOnsBE4JNeOgkmABKmjFl6mzJXmlA=; b=SL/9RkS4Tdk63GEC9Sf39m1/SEZU1yXGbvcvVGNhD3TPwAbm/PCPswu6xv4OXqad77 gbwrJ3TE5ghvas7aU/i+bq+KZnW8UTpxgi4TojlzlAjteiWyxE6DhfR4QqUdue/d6YQA C8SxjLnaMVqEOT05cCOd9A0ast5UHlgmU+zGaLk4+Sgy1widz4OBRpMHVsY7QL/vD2Li 2UvOL1wF46OLk8x6MR50AA4qVncIhHQJ+4fRSauYjFL6KQhI8+VgB7tdS31daQmh14lN Hm4gocz3iEVALpqh5za1IWlm/ifU4btbpmuodm1M2wMOLMziD+X4VHKwV9rFeRedwbRT J3TQ== X-Gm-Message-State: AKaTC0365a8wsNu2ZUuJaAl26WSBX7MAeGv+kWGFMOKb/v4FPYCeyB1cDt5lZX5tzfy31+1LvTU= X-Received: by 10.99.55.30 with SMTP id e30mr74984358pga.75.1480652162660; Thu, 01 Dec 2016 20:16:02 -0800 (PST) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id u78sm3402349pfa.53.2016.12.01.20.16.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 01 Dec 2016 20:16:02 -0800 (PST) From: Heyi Guo To: linaro-uefi@lists.linaro.org Date: Fri, 2 Dec 2016 12:13:25 +0800 Message-Id: <1480652017-31676-33-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1480652017-31676-1-git-send-email-heyi.guo@linaro.org> References: <1480652017-31676-1-git-send-email-heyi.guo@linaro.org> Cc: sunchenhui@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v5 32/44] Hisilicon/SMBIOS: Update ProcessorID from MIDR X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" There is no register restore processor id at ARM Platform,we talked with ARM Charles and made a agreement that we can use MIDR instead,maybe there will be a specific register to read the processor id in future. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo Reviewed-by: Leif Lindholm Reviewed-by: Charles Garcia-Tobin --- .../Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c index 07dae5f..005d28f 100644 --- a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c +++ b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c @@ -490,6 +490,7 @@ AddSmbiosProcessorTypeTable ( CHAR16 *CpuVersion; STRING_REF TokenToUpdate; + UINT64 *ProcessorId; Type4Record = NULL; ProcessorManuStr = NULL; ProcessorVersionStr = NULL; @@ -614,6 +615,8 @@ AddSmbiosProcessorTypeTable ( Type4Record->ProcessorCharacteristics = ProcessorCharacteristics.Data; Type4Record->ExternalClock = (UINT16)(ArmReadCntFrq() / 1000 / 1000); + ProcessorId = (UINT64 *)&(Type4Record->ProcessorId); + *ProcessorId = ArmReadMidr(); OptionalStrStart = (CHAR8 *) (Type4Record + 1); UnicodeStrToAsciiStr (ProcessorSocketStr, OptionalStrStart);