From patchwork Thu Nov 10 13:52:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 81662 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp741006qge; Thu, 10 Nov 2016 06:05:30 -0800 (PST) X-Received: by 10.129.120.215 with SMTP id t206mr5647045ywc.39.1478786730359; Thu, 10 Nov 2016 06:05:30 -0800 (PST) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id 126si2700011qkl.62.2016.11.10.06.05.29; Thu, 10 Nov 2016 06:05:30 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id E344260CD9; Thu, 10 Nov 2016 14:05:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2 autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 23BDC607DF; Thu, 10 Nov 2016 13:58:37 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 59BC9607DF; Thu, 10 Nov 2016 13:58:31 +0000 (UTC) Received: from mail-pf0-f178.google.com (mail-pf0-f178.google.com [209.85.192.178]) by lists.linaro.org (Postfix) with ESMTPS id 2E79060E4F for ; Thu, 10 Nov 2016 13:53:46 +0000 (UTC) Received: by mail-pf0-f178.google.com with SMTP id i88so146368386pfk.2 for ; Thu, 10 Nov 2016 05:53:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=f22ShDUgOeIKFwupoEyENA9/SYhPWJICpaQz6Ynrd0k=; b=EcV8uZbM5mbcUQeIQWfh+lxE824J1B88EbCey7UaN+dhsMrXf0Pn/JJcm7UimdaI8I wh+u75zsKZh+QEy7KlGLCiJTvi6QVv2VIvZYSMdKPUv7u7PmtCLuB06tkBO+ri6gli7o utLZ/84QBWmT/BxxKZXVo4hnW+9lC6lDWc/c0AsvUmTZyKSpOoBuyWhgTkqvV6/ZtDdY oXVggfsMy1iXWpiqZBF5UvJDRChV9v0mFetFRDvIjGnOkQcWyhEoasqMQ55kk/cDMa+/ 7ZgXnRBEez+JVvJJmCcVg7XNJKRFL6gmSGLh9zEC+ih/ZenESUW3npoInzbXqtY4hmBc Lwcw== X-Gm-Message-State: ABUngvfHnnZdS6nQ6fndzN6s48kfEp6/fypR00X3QHnTxR3fh6rqZmB0J6kczZbEb+qBLuwNYfg= X-Received: by 10.98.152.3 with SMTP id q3mr10302802pfd.144.1478786025494; Thu, 10 Nov 2016 05:53:45 -0800 (PST) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id g78sm7625705pfe.19.2016.11.10.05.53.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 10 Nov 2016 05:53:45 -0800 (PST) From: Heyi Guo To: linaro-uefi@lists.linaro.org Date: Thu, 10 Nov 2016 21:52:16 +0800 Message-Id: <1478785950-24197-13-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1478785950-24197-1-git-send-email-heyi.guo@linaro.org> References: <1478785950-24197-1-git-send-email-heyi.guo@linaro.org> Subject: [Linaro-uefi] [PATCH 12/27] Hisilicon/PlatformSysCtrlLib: add more interfaces to support D05 X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" System initialization on D05 has some differences from that on D02 and D03, so we extract more platform system control interfaces to support D05 within the same architectural modules. The actual function definitions are in PlatformSysCtrlLib which is a binary, and will be updated later. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo --- Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h b/Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h index f374112..ec2b9a3 100644 --- a/Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h +++ b/Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h @@ -90,8 +90,17 @@ VOID DResetUsb (); UINT32 PlatformGetEhciBase (); UINT32 PlatformGetOhciBase (); VOID PlatformPllInit(); +// PLL initialization for super IO clusters. +VOID SiclPllInit(UINT32 SclId); VOID PlatformDeviceDReset(); VOID PlatformGicdInit(); VOID PlatformLpcInit(); +// Synchronize architecture timer counter between different super computing +// clusters. +VOID PlatformArchTimerSynchronize(VOID); +VOID PlatformEventBroadcastConfig(VOID); +UINTN GetDjtagRegBase(UINT32 NodeId); +VOID LlcCleanInvalidateAsm(VOID); +VOID PlatformMdioInit(VOID); #endif