From patchwork Thu May 12 10:17:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 67633 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp672129qge; Thu, 12 May 2016 03:18:08 -0700 (PDT) X-Received: by 10.55.115.69 with SMTP id o66mr8924372qkc.168.1463048288818; Thu, 12 May 2016 03:18:08 -0700 (PDT) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id p92si8081777qge.77.2016.05.12.03.18.08; Thu, 12 May 2016 03:18:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 783A961647; Thu, 12 May 2016 10:18:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 2D4A76156A; Thu, 12 May 2016 10:18:05 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 83AD8615E3; Thu, 12 May 2016 10:17:58 +0000 (UTC) Received: from mail-wm0-f41.google.com (mail-wm0-f41.google.com [74.125.82.41]) by lists.linaro.org (Postfix) with ESMTPS id 78EC66156A for ; Thu, 12 May 2016 10:17:54 +0000 (UTC) Received: by mail-wm0-f41.google.com with SMTP id a17so127460879wme.0 for ; Thu, 12 May 2016 03:17:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=LXV/R71Vf6Ri1M3EY4fL69G+9nnBMeL0TwJzHnATU0Y=; b=jTeCatji/2MnQaaDBO7G27e/19eCZqFIWyOTo/T16DPJWwT+dxhCuI/ERDakJ07uPt a6TtJuR3b/g4CeTyi5KTAOUb2MPr57QZrQJj2DulBPDnk1P1lnKUBy4b498yLUK3BXjt J9rsaWeOX80HF3JlgwjA2Dmp+ds/wfFVEntnE1o3Co0mvB7YAd3eHHF8KjK6/lKwKAft hrjnNAF7F5iE/HuPZYbLeboZUmpNlNrLLOmi0okoTs+PURL3VOJ1RvzvT3/hKDKWxplu AUaffP8nJ63OTm0dXshJWJdUQ2ozNaJ5+0MdT0v9UuNfGrR/8MGEGOSaylWyh93H5Tmy s9YQ== X-Gm-Message-State: AOPr4FV1wRjma2Co3KNukUJNaIVBpTKpuMk4miWEftcNdSAtFgJUawy9ga8MEY8mMVjipyFe6y8= X-Received: by 10.28.148.202 with SMTP id w193mr5237884wmd.29.1463048273666; Thu, 12 May 2016 03:17:53 -0700 (PDT) Received: from localhost.localdomain ([195.55.142.58]) by smtp.gmail.com with ESMTPSA id by7sm12620378wjc.18.2016.05.12.03.17.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 12 May 2016 03:17:52 -0700 (PDT) From: Ard Biesheuvel To: linaro-uefi@lists.linaro.org Date: Thu, 12 May 2016 12:17:45 +0200 Message-Id: <1463048265-4692-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 Cc: leo.duran@amd.com Subject: [Linaro-uefi] [PATCH] Platforms/AMD/Styx: remove unused BootMode module from DSC X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" The boot mode PPI is already produced by the PlatformPeim.inf in ArmPlatformPkg, and the Nt32Pkg BootModePei is not even referenced in our .FDFs. So just drop it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 1 - Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 1 - 2 files changed, 2 deletions(-) diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 345f04a25e3e..0828d02dff43 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -481,7 +481,6 @@ DEFINE DO_RTK = 0 OpenPlatformPkg/Platforms/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf ArmPkg/Drivers/CpuPei/CpuPei.inf - Nt32Pkg/BootModePei/BootModePei.inf MdeModulePkg/Universal/Variable/Pei/VariablePei.inf MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 68c3321be37e..1bd6f2ba70a5 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -512,7 +512,6 @@ DEFINE DO_RTK = 0 OpenPlatformPkg/Platforms/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf ArmPkg/Drivers/CpuPei/CpuPei.inf - Nt32Pkg/BootModePei/BootModePei.inf MdeModulePkg/Universal/Variable/Pei/VariablePei.inf MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {