From patchwork Fri Dec 21 12:49:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Radoslaw Biernacki X-Patchwork-Id: 154393 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp878780ljp; Fri, 21 Dec 2018 04:49:45 -0800 (PST) X-Google-Smtp-Source: ALg8bN6s4MYBDWEsoLxXnmBUFleeMuIB3BZK8t9+lUQLR8f0i9Otn9B59sgOcw4YvGkw9N/2T0cb X-Received: by 2002:a0c:fb4c:: with SMTP id b12mr2166758qvq.177.1545396585500; Fri, 21 Dec 2018 04:49:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545396585; cv=none; d=google.com; s=arc-20160816; b=nG7xWW+Pyc4CCOYdG1uggaeMXab36N7SfpELWh2t0oh+05hMTZjc3ZQrW8tV4GsT7w 2YYyCKnC1zDiUcpdhbw83QZx7D3wuy7Y+fdB3120ky9DJqJHgCHYYSJxOgxfCrId9T+E Hae78GV6DEs4nDQs4ETHZ5/ib/Bcdebz3wrb6WMHDrdSRwWfXG3cBISaCZcjMYs7YQ9x 0cG4A+grTq7X9KHqKwbQqzzk/DyUZsiufg+db7bkvr9sQRFTSIIAdQdrM5qv+WZa+hwm 2KlvOxRO5Y+JYb0pO9OkIv44GVAd7vBhA+4dHQUTBToeTxW7LAwUhQ8dk8Q3N5LwImBg 8tRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:delivered-to; bh=fyNqaDxIDBJ+eLw/Cx0qEj7Jh/Q1YHEeD5LJDoBCUk4=; b=LgCHV7sNYna7gGk4B+ecOZpZUajD/AinYw3JlGSWvO48H4wpwe1tm4hbgpa1OIOEpU WTNXRHd+m4uxRbD1v8YZcUWmSWmwl9pByQ7p6ZwmmZqtP+kMzvHqTnfwBS8FEFu703GS PMwAt4apFN0nB+uvGWctIYtEiraUpv51VS787EII7rtjb7/E4vGrTWKExejsGvED4xc3 hPXudWFm2W8H9A8DnWySM1pNWq5vcjj8ffHM98VBnA3Z78LrFAiDOAPNcxFROMf3rcBA JblVgHwpd6h6JurKC+4JpXPuShAM3GCigCl6NE41J4RaS86JldgGOaDaLkd8EwAFCuUD OC4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id q12si2589369qtl.33.2018.12.21.04.49.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 21 Dec 2018 04:49:45 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 4A62462B08; Fri, 21 Dec 2018 12:49:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2 autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id EA6E4629A4; Fri, 21 Dec 2018 12:49:37 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id C7324629A4; Fri, 21 Dec 2018 12:49:34 +0000 (UTC) Received: from mail-lf1-f66.google.com (mail-lf1-f66.google.com [209.85.167.66]) by lists.linaro.org (Postfix) with ESMTPS id 6A93661929 for ; Fri, 21 Dec 2018 12:49:33 +0000 (UTC) Received: by mail-lf1-f66.google.com with SMTP id l10so3824019lfh.9 for ; Fri, 21 Dec 2018 04:49:33 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=TG7km+uyB06Qh1QAM88kYIWHssWcf+qr0oZcE0fHVSE=; b=Nv5KPfWg1GmAEVeShvixg8BrzwtP9sYJGPW+iCE0X6z3hoFb6Im8F1E5CvdVPnrhQ8 xaYSsvU59IOGmXgn5k7wXOjbQSuglFzEIl2oJuahyBqmyeszsqeNC7NuGXWoHChpkkTy AjPITtuF6fyyww3Oj06pxCcuCmwbgmHAnpqNmpCQjx8GRLyD67ypSxNivBqIAaILDNwx hrmwZUdUE2Gq+78IdizU3kNKmQYJOwddyxmeKE7JaNwFlO8svnYD8GA0yFh5FbSLY2K5 wGCoX/ILd+6BJIqbLFEJjo8ozUXXu4/8YseA/CF7yTOCiLpPa48ivcBC6RmnY3WDtnmn KpAw== X-Gm-Message-State: AA+aEWZMN3RYBhvrhDASQQDSL1PEe2Vi0RP+vA/ZT22rp7Qd+SpvGPES llh/IYRgb8cBtob82b9LiedV/f4blBiPVIio X-Received: by 2002:a19:41c4:: with SMTP id o187mr1419525lfa.32.1545396571780; Fri, 21 Dec 2018 04:49:31 -0800 (PST) Received: from rad-H81M-S1.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id 10sm968393ljr.4.2018.12.21.04.49.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 21 Dec 2018 04:49:31 -0800 (PST) From: Radoslaw Biernacki To: linaro-uefi@lists.linaro.org Date: Fri, 21 Dec 2018 13:49:10 +0100 Message-Id: <20181221124911.15495-1-radoslaw.biernacki@linaro.org> X-Mailer: git-send-email 2.14.1 Subject: [Linaro-uefi] [RFC 0/1] SBSAQemu UEFI initial implementation X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" This is RFC for UEFI implementation for new machine based on Qemu Virt which is faithful as possible to real hardware. In opposition to existing Qemu Virt machine which is suited for performing workloads, the purpose of this machine is development of firmware and OS for AARCH64 server alike platforms (like in situation where real HW is not available yet or the debugging is easier to control under emulation). The SBSAQemu name, was chosen because the modeled HW is aimed to follow way that server-style armv8 machines are recommended to be set up. Implementation does not use fw-cfg nor DT provided by Qemu. This patch is provided as presentation for progress, not functional UEFI implementation. You cannot boot system at current state. To mention just few missing features: - Qemu <-> ATF <-> UEFI communication channel for dynamic parameters like DRAM size - Related dynamic initialization in UEFI is for now with static PCD's - ACPI platform driver - SMBIOS Support Implementation support sbsa-ref machine which is also work in progress. The provided patch is compatible with V3 of Qemu patches: "[PATCH v3] hw/arm: Add arm SBSA reference machine" by Hongbo Zhang: Compatible Qemu code can be also found in repo: https://git.linaro.org/people/hongbo.zhang/qemu-enterprise.git/ branch sbsa-v3.0.0 1e47e69c69 The most recent v5 patches contains memory map change which is not compatible with provided UEFI code at this momment. The compatible ATF code can be downloaded from: ssh://git@git.linaro.org/people/radoslaw.biernacki/atf.git branch wip_rad_sbsa_continue 05b8dfb7 For compilation of ATF code please follow atf/docs/plat/sbsa.rst The compilation of edk2-platforms follows usual way described in edk2-platform/Readme.md. The only change is that SBSAQemu requires that ATF images (bl1.bin and fip.bin) need to be copied to workspace directory. To compile issue following command seqence from workspace dir: $ export WORKSPACE=$PWD $ export PACKAGES_PATH=$PWD/edk2:$PWD/edk2-platforms $ make -C edk2/BaseTools $ export GCC5_AARCH64_PREFIX=aarch64-linux-gnu- $ . edk2/edksetup.sh $ build -n 4 -b DEBUG -a AARCH64 -t GCC5 -p edk2-platforms/Platform/SBSAQemu/SBSAQemu.dsc The resulting SBSA_FLASH0.fd file will contain secure flash0 image (ATF code). The SBSA_FLASH1.fd will contain non-secure UEFI code and UEFI variables. As Qemu expects both files to be specific size those files need a trim by: truncate -s 67108864 SBSA_FLASH0.fd (this issue will be fixed in following patches) Similar instruction how to build ATF and EDK2 for SBSAQemu can be found in atf/docs/plat/sbsa.rst For testing author used following command sequence issued from workspace dir: $ cp Build/SBSAQemu-AARCH64/DEBUG_GCC5/FV/SBSA_FLASH[01].fd . $ truncate -s 67108864 SBSA_FLASH0.fd $ truncate -s 67108864 SBSA_FLASH1.fd $ qemu_inst/bin/qemu-system-aarch64 -m 1024 -cpu cortex-a57 -M sbsa-ref,secure=on -pflash SBSA_FLASH0.fd -pflash SBSA_FLASH1.fd -serial stdio -hda disk1.img Where disk1.img is disk image with EFI compatible partition layout. In case you provide Linux with GRUB you should be able to see working Qemu emulated VGA with list of boot options. The proper boot requires future work on mentioned missing features. Please provide feedback which might be helpfull for future development. Radoslaw Biernacki (1): SBSAQemu: Initial implementation for QemuSBSA Silicon/Qemu/SBSAQemuPkg.dec | 45 ++ Platform/SBSAQemu/SBSAQemu.dsc | 807 ++++++++++++++++++++ Platform/SBSAQemu/SBSAQemu.fdf | 368 +++++++++ Silicon/Qemu/Drivers/SBSAQemuPlatformDxe/SBSAQemuPlatformDxe.inf | 47 ++ Silicon/Qemu/Library/SBSANorFlashQemuLib/SBSANorFlashQemuLib.inf | 35 + Silicon/Qemu/Library/SBSAPciHostBridgeLib/SBSAPciHostBridgeLib.inf | 44 ++ Silicon/Qemu/Library/SBSAQemuLib/SBSAQemuLib.inf | 54 ++ Silicon/Qemu/Drivers/SBSAQemuPlatformDxe/SBSAQemuPlatformDxe.c | 61 ++ Silicon/Qemu/Library/SBSANorFlashQemuLib/SBSANorFlashQemuLib.c | 45 ++ Silicon/Qemu/Library/SBSAPciHostBridgeLib/SBSAPciHostBridgeLib.c | 201 +++++ Silicon/Qemu/Library/SBSAQemuLib/SBSAQemuLib.c | 148 ++++ Silicon/Qemu/Library/SBSAQemuLib/SBSAQemuMem.c | 109 +++ Silicon/Qemu/Library/SBSAQemuLib/SBSAQemuHelper.S | 63 ++ 13 files changed, 2027 insertions(+) create mode 100644 Silicon/Qemu/SBSAQemuPkg.dec create mode 100644 Platform/SBSAQemu/SBSAQemu.dsc create mode 100644 Platform/SBSAQemu/SBSAQemu.fdf create mode 100644 Silicon/Qemu/Drivers/SBSAQemuPlatformDxe/SBSAQemuPlatformDxe.inf create mode 100644 Silicon/Qemu/Library/SBSANorFlashQemuLib/SBSANorFlashQemuLib.inf create mode 100644 Silicon/Qemu/Library/SBSAPciHostBridgeLib/SBSAPciHostBridgeLib.inf create mode 100644 Silicon/Qemu/Library/SBSAQemuLib/SBSAQemuLib.inf create mode 100644 Silicon/Qemu/Drivers/SBSAQemuPlatformDxe/SBSAQemuPlatformDxe.c create mode 100644 Silicon/Qemu/Library/SBSANorFlashQemuLib/SBSANorFlashQemuLib.c create mode 100644 Silicon/Qemu/Library/SBSAPciHostBridgeLib/SBSAPciHostBridgeLib.c create mode 100644 Silicon/Qemu/Library/SBSAQemuLib/SBSAQemuLib.c create mode 100644 Silicon/Qemu/Library/SBSAQemuLib/SBSAQemuMem.c create mode 100644 Silicon/Qemu/Library/SBSAQemuLib/SBSAQemuHelper.S