| Message ID | 20170505194745.3627137-76-arnd@arndb.de |
|---|---|
| State | New |
| Headers | show |
| Series | build warnings and errors | expand |
On 5 May 2017 at 20:47, Arnd Bergmann <arnd@arndb.de> wrote: > From: Ard Biesheuvel <ard.biesheuvel@linaro.org> > > Commit 69bbf2ab20389418327484288d8730732e4f3dd0 upstream. > > Two files that get included when building the multi_v7_defconfig target > fail to build when selecting THUMB2_KERNEL for this configuration. > > In both cases, we can just build the file as ARM code, as none of its > symbols are exported to modules, so there are no interworking concerns. > In the iwmmxt.S case, add ENDPROC() declarations so the symbols are > annotated as functions, resulting in the linker to emit the appropriate > mode switches. > > Acked-by: Nicolas Pitre <nico@linaro.org> > Tested-by: Olof Johansson <olof@lixom.net> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> > Signed-off-by: Arnd Bergmann <arnd@arndb.de> I think you will want to take 5008efc83bf85b647aa1cbc44718b1675bbb7444 as well. This patch by itself caused problems with ftrace's instruction patching IIRC. > --- > arch/arm/kernel/Makefile | 1 + > arch/arm/kernel/iwmmxt.S | 13 +++++++++++++ > 2 files changed, 14 insertions(+) > > diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile > index 03120e656aea..2ecc7d15bc09 100644 > --- a/arch/arm/kernel/Makefile > +++ b/arch/arm/kernel/Makefile > @@ -84,6 +84,7 @@ obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o > obj-$(CONFIG_IWMMXT) += iwmmxt.o > obj-$(CONFIG_PERF_EVENTS) += perf_regs.o > obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o > +CFLAGS_pj4-cp0.o := -marm > AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt > obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o > > diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S > index 2b32978ae905..d65bb940d797 100644 > --- a/arch/arm/kernel/iwmmxt.S > +++ b/arch/arm/kernel/iwmmxt.S > @@ -58,6 +58,7 @@ > #define MMX_SIZE (0x98) > > .text > + .arm > > /* > * Lazy switching of Concan coprocessor context > @@ -182,6 +183,8 @@ concan_load: > tmcr wCon, r2 > mov pc, lr > > +ENDPROC(iwmmxt_task_enable) > + > /* > * Back up Concan regs to save area and disable access to them > * (mainly for gdb or sleep mode usage) > @@ -232,6 +235,8 @@ ENTRY(iwmmxt_task_disable) > 1: msr cpsr_c, ip @ restore interrupt mode > ldmfd sp!, {r4, pc} > > +ENDPROC(iwmmxt_task_disable) > + > /* > * Copy Concan state to given memory address > * > @@ -268,6 +273,8 @@ ENTRY(iwmmxt_task_copy) > msr cpsr_c, ip @ restore interrupt mode > mov pc, r3 > > +ENDPROC(iwmmxt_task_copy) > + > /* > * Restore Concan state from given memory address > * > @@ -304,6 +311,8 @@ ENTRY(iwmmxt_task_restore) > msr cpsr_c, ip @ restore interrupt mode > mov pc, r3 > > +ENDPROC(iwmmxt_task_restore) > + > /* > * Concan handling on task switch > * > @@ -335,6 +344,8 @@ ENTRY(iwmmxt_task_switch) > mrc p15, 0, r1, c2, c0, 0 > sub pc, lr, r1, lsr #32 @ cpwait and return > > +ENDPROC(iwmmxt_task_switch) > + > /* > * Remove Concan ownership of given task > * > @@ -353,6 +364,8 @@ ENTRY(iwmmxt_task_release) > msr cpsr_c, r2 @ restore interrupts > mov pc, lr > > +ENDPROC(iwmmxt_task_release) > + > .data > concan_owner: > .word 0 > -- > 2.9.0 >
On Sat, May 6, 2017 at 9:42 AM, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote: > On 5 May 2017 at 20:47, Arnd Bergmann <arnd@arndb.de> wrote: >> From: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> >> Commit 69bbf2ab20389418327484288d8730732e4f3dd0 upstream. >> >> Two files that get included when building the multi_v7_defconfig target >> fail to build when selecting THUMB2_KERNEL for this configuration. >> >> In both cases, we can just build the file as ARM code, as none of its >> symbols are exported to modules, so there are no interworking concerns. >> In the iwmmxt.S case, add ENDPROC() declarations so the symbols are >> annotated as functions, resulting in the linker to emit the appropriate >> mode switches. >> >> Acked-by: Nicolas Pitre <nico@linaro.org> >> Tested-by: Olof Johansson <olof@lixom.net> >> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> >> Signed-off-by: Arnd Bergmann <arnd@arndb.de> > > I think you will want to take 5008efc83bf85b647aa1cbc44718b1675bbb7444 > as well. This patch by itself caused problems with ftrace's > instruction patching IIRC. Right, thanks for the reminder. As the original patch was already in 3.18 and 4.4, but the second one was not, I have also submitted 5008efc83bf85 for inclusion in those two stable series now, besides adding it to my local series here. Arnd
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 03120e656aea..2ecc7d15bc09 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -84,6 +84,7 @@ obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_PERF_EVENTS) += perf_regs.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o +CFLAGS_pj4-cp0.o := -marm AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index 2b32978ae905..d65bb940d797 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S @@ -58,6 +58,7 @@ #define MMX_SIZE (0x98) .text + .arm /* * Lazy switching of Concan coprocessor context @@ -182,6 +183,8 @@ concan_load: tmcr wCon, r2 mov pc, lr +ENDPROC(iwmmxt_task_enable) + /* * Back up Concan regs to save area and disable access to them * (mainly for gdb or sleep mode usage) @@ -232,6 +235,8 @@ ENTRY(iwmmxt_task_disable) 1: msr cpsr_c, ip @ restore interrupt mode ldmfd sp!, {r4, pc} +ENDPROC(iwmmxt_task_disable) + /* * Copy Concan state to given memory address * @@ -268,6 +273,8 @@ ENTRY(iwmmxt_task_copy) msr cpsr_c, ip @ restore interrupt mode mov pc, r3 +ENDPROC(iwmmxt_task_copy) + /* * Restore Concan state from given memory address * @@ -304,6 +311,8 @@ ENTRY(iwmmxt_task_restore) msr cpsr_c, ip @ restore interrupt mode mov pc, r3 +ENDPROC(iwmmxt_task_restore) + /* * Concan handling on task switch * @@ -335,6 +344,8 @@ ENTRY(iwmmxt_task_switch) mrc p15, 0, r1, c2, c0, 0 sub pc, lr, r1, lsr #32 @ cpwait and return +ENDPROC(iwmmxt_task_switch) + /* * Remove Concan ownership of given task * @@ -353,6 +364,8 @@ ENTRY(iwmmxt_task_release) msr cpsr_c, r2 @ restore interrupts mov pc, lr +ENDPROC(iwmmxt_task_release) + .data concan_owner: .word 0