| Message ID | 1340190715-23648-3-git-send-email-rajeshwari.s@samsung.com |
|---|---|
| State | New |
| Headers | show |
Hi Rajeshwari, On 06/20/2012 08:11 PM, Rajeshwari Shinde wrote: > This patch modifies the pinmux settings of MMC and UART as per > Exynos5250 Rev 1.0 > > Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> > --- > Chnages in V2: > - None > arch/arm/cpu/armv7/exynos/pinmux.c | 18 +++++++++--------- > 1 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c > index d2b7d2c..7611c7a 100644 > --- a/arch/arm/cpu/armv7/exynos/pinmux.c > +++ b/arch/arm/cpu/armv7/exynos/pinmux.c > @@ -40,8 +40,8 @@ static void exynos5_uart_config(int peripheral) > count = 4; > break; > case PERIPH_ID_UART1: > - bank = &gpio1->a0; > - start = 4; > + bank = &gpio1->d0; > + start = 0; > count = 4; > break; > case PERIPH_ID_UART2: > @@ -66,25 +66,25 @@ static int exynos5_mmc_config(int peripheral, int flags) > struct exynos5_gpio_part1 *gpio1 = > (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); > struct s5p_gpio_bank *bank, *bank_ext; > - int i; > + int i, start; > > switch (peripheral) { > case PERIPH_ID_SDMMC0: > bank = &gpio1->c0; > bank_ext = &gpio1->c1; > + start = 0; > break; > case PERIPH_ID_SDMMC1: > - bank = &gpio1->c1; > + bank = &gpio1->c2; > bank_ext = NULL; > break; > case PERIPH_ID_SDMMC2: > - bank = &gpio1->c2; > - bank_ext = &gpio1->c3; > - break; > - case PERIPH_ID_SDMMC3: > bank = &gpio1->c3; > bank_ext = NULL; > break; if SDMMC2 is supported 8BIT_MODE. Need gpio1->c4, > + case PERIPH_ID_SDMMC3: > + debug("SDMMC3 not supported yet"); > + return -1; > } > if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) { > debug("SDMMC device %d does not support 8bit mode", > @@ -92,7 +92,7 @@ static int exynos5_mmc_config(int peripheral, int flags) > return -1; > } > if (flags & PINMUX_FLAG_8BIT_MODE) { > - for (i = 3; i <= 6; i++) { > + for (i = start; i <= (start + 3); i++) { > s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3)); At EVT1, i known GPIO_FUNC(0x3) is wrong. > s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP); > s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
Hi Jaehoon Chung On Wed, Jun 20, 2012 at 5:28 PM, Jaehoon Chung <jh80.chung@samsung.com> wrote: > Hi Rajeshwari, > > On 06/20/2012 08:11 PM, Rajeshwari Shinde wrote: > >> This patch modifies the pinmux settings of MMC and UART as per >> Exynos5250 Rev 1.0 >> >> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> >> --- >> Chnages in V2: >> - None >> arch/arm/cpu/armv7/exynos/pinmux.c | 18 +++++++++--------- >> 1 files changed, 9 insertions(+), 9 deletions(-) >> >> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c >> index d2b7d2c..7611c7a 100644 >> --- a/arch/arm/cpu/armv7/exynos/pinmux.c >> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c >> @@ -40,8 +40,8 @@ static void exynos5_uart_config(int peripheral) >> count = 4; >> break; >> case PERIPH_ID_UART1: >> - bank = &gpio1->a0; >> - start = 4; >> + bank = &gpio1->d0; >> + start = 0; >> count = 4; >> break; >> case PERIPH_ID_UART2: >> @@ -66,25 +66,25 @@ static int exynos5_mmc_config(int peripheral, int flags) >> struct exynos5_gpio_part1 *gpio1 = >> (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); >> struct s5p_gpio_bank *bank, *bank_ext; >> - int i; >> + int i, start; >> >> switch (peripheral) { >> case PERIPH_ID_SDMMC0: >> bank = &gpio1->c0; >> bank_ext = &gpio1->c1; >> + start = 0; >> break; >> case PERIPH_ID_SDMMC1: >> - bank = &gpio1->c1; >> + bank = &gpio1->c2; >> bank_ext = NULL; >> break; >> case PERIPH_ID_SDMMC2: >> - bank = &gpio1->c2; >> - bank_ext = &gpio1->c3; >> - break; >> - case PERIPH_ID_SDMMC3: >> bank = &gpio1->c3; >> bank_ext = NULL; >> break; > > if SDMMC2 is supported 8BIT_MODE. Need gpio1->c4, -- ohh ok the manual which I have does not have gpio1->c4. I possible can you send me the user manual which you are referring to. > >> + case PERIPH_ID_SDMMC3: >> + debug("SDMMC3 not supported yet"); >> + return -1; > >> } >> if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) { >> debug("SDMMC device %d does not support 8bit mode", >> @@ -92,7 +92,7 @@ static int exynos5_mmc_config(int peripheral, int flags) >> return -1; >> } >> if (flags & PINMUX_FLAG_8BIT_MODE) { >> - for (i = 3; i <= 6; i++) { >> + for (i = start; i <= (start + 3); i++) { >> s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3)); > > At EVT1, i known GPIO_FUNC(0x3) is wrong. -- Ohh ok > >> s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP); >> s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X); > > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot Regards, Rajeshwari Shinde.
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index d2b7d2c..7611c7a 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -40,8 +40,8 @@ static void exynos5_uart_config(int peripheral) count = 4; break; case PERIPH_ID_UART1: - bank = &gpio1->a0; - start = 4; + bank = &gpio1->d0; + start = 0; count = 4; break; case PERIPH_ID_UART2: @@ -66,25 +66,25 @@ static int exynos5_mmc_config(int peripheral, int flags) struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); struct s5p_gpio_bank *bank, *bank_ext; - int i; + int i, start; switch (peripheral) { case PERIPH_ID_SDMMC0: bank = &gpio1->c0; bank_ext = &gpio1->c1; + start = 0; break; case PERIPH_ID_SDMMC1: - bank = &gpio1->c1; + bank = &gpio1->c2; bank_ext = NULL; break; case PERIPH_ID_SDMMC2: - bank = &gpio1->c2; - bank_ext = &gpio1->c3; - break; - case PERIPH_ID_SDMMC3: bank = &gpio1->c3; bank_ext = NULL; break; + case PERIPH_ID_SDMMC3: + debug("SDMMC3 not supported yet"); + return -1; } if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) { debug("SDMMC device %d does not support 8bit mode", @@ -92,7 +92,7 @@ static int exynos5_mmc_config(int peripheral, int flags) return -1; } if (flags & PINMUX_FLAG_8BIT_MODE) { - for (i = 3; i <= 6; i++) { + for (i = start; i <= (start + 3); i++) { s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3)); s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP); s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
This patch modifies the pinmux settings of MMC and UART as per Exynos5250 Rev 1.0 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> --- Chnages in V2: - None arch/arm/cpu/armv7/exynos/pinmux.c | 18 +++++++++--------- 1 files changed, 9 insertions(+), 9 deletions(-)