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[v2] spi: dt-bindings: cdns,qspi-nor: Update minItems/maxItems of resets for Cadence OSPI controller

Message ID 20250522104745.327675-1-amit.kumar-mahapatra@amd.com
State New
Headers show
Series [v2] spi: dt-bindings: cdns,qspi-nor: Update minItems/maxItems of resets for Cadence OSPI controller | expand

Commit Message

Amit Kumar Mahapatra May 22, 2025, 10:47 a.m. UTC 
The Cadence Octal SPI (OSPI) controller on AMD Versal SoCs requires only
one reset entry. To reflect this, the maxItems for "resets" and
"reset-names" has been set to 1 for AMD Versal SoCs, and the minItems for
these properties has also been updated to 1.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
---
BRANCH: mtd/next

Changes in v2:
 - Removed "resets" & "reset-names" from required properties.
 - To address review comments, removed "maxItems" from "reset-names".
---
 .../devicetree/bindings/spi/cdns,qspi-nor.yaml        | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
index d48ecd6cd5ad..648b8452877c 100644
--- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
@@ -17,6 +17,13 @@  allOf:
           contains:
             const: xlnx,versal-ospi-1.0
     then:
+      properties:
+        resets:
+          maxItems: 1
+
+        reset-names:
+          items:
+            enum: [ qspi ]
       required:
         - power-domains
   - if:
@@ -132,11 +139,11 @@  properties:
     maxItems: 1
 
   resets:
-    minItems: 2
+    minItems: 1
     maxItems: 3
 
   reset-names:
-    minItems: 2
+    minItems: 1
     maxItems: 3
     items:
       enum: [ qspi, qspi-ocp, rstc_ref ]