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[v1,1/2] dt-bindings: usb: Add Eswin EIC7700 Usb controller

Message ID 20250516095338.1467-1-zhangsenchuan@eswincomputing.com
State New
Headers show
Series [v1,1/2] dt-bindings: usb: Add Eswin EIC7700 Usb controller | expand

Commit Message

zhangsenchuan@eswincomputing.com May 16, 2025, 9:53 a.m. UTC 
From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>

Add Device Tree binding documentation for the ESWIN EIC7700
usb controller module.

Co-developed-by: Wei Yang <yangwei1@eswincomputing.com>
Signed-off-by: Wei Yang <yangwei1@eswincomputing.com>
Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
---
 .../bindings/usb/eswin,eic7700-usb.yaml       | 120 ++++++++++++++++++
 1 file changed, 120 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml
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Patch

diff --git a/Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml b/Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml
new file mode 100644
index 000000000000..eb8260069b99
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml
@@ -0,0 +1,120 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/eswin,eic7700-usb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Eswin EIC7700 SoC Usb Controller
+
+maintainers:
+  - Wei Yang <yangwei1@eswincomputing.com>
+  - Senchuan Zhang <zhangsenchuan@eswincomputing.com>
+
+description: |
+  The Usb controller on EIC7700 SoC.
+
+properties:
+  compatible:
+    const: eswin,eic7700-usb
+
+  reg:
+    maxItems: 3
+
+  interrupts:
+    maxItems: 1
+
+  interrupt-names:
+    items:
+      - const: peripheral
+
+  clocks:
+    maxItems: 3
+    description: handles to clock for the usb controller.
+
+  clock-names:
+    items:
+      - const: suspend
+      - const: aclk
+      - const: cfg_clk
+    description: the name of each clock.
+
+  resets:
+    description: resets to be used by the controller.
+
+  reset-names:
+    items:
+      - const: vaux
+    description: names of the resets listed in resets property in the same order.
+
+  eswin,hsp_sp_csr:
+    description: |
+      High-speed equipment control register.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+
+  ranges: true
+
+  dma-noncoherent: true
+
+  numa-node-id:
+    maximum: 0
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-names
+  - interrupt-parent
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+  - eswin,hsp_sp_csr
+  - dma-noncoherent
+  - ranges
+  - numa-node-id
+
+additionalProperties: false
+
+examples:
+  - |
+    usb {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        usbdrd3_0: usb0{
+          compatible = "eswin,eic7700-dwc3";
+          #address-cells = <2>;
+          #size-cells = <2>;
+          clocks = <&clock 270>,
+                   <&clock 545>,
+                   <&clock 546>;
+          clock-names = "suspend","aclk", "cfg_clk";
+          eswin,hsp_sp_csr = <&hsp_sp_csr 0x800 0x808 0x83c 0x840>;
+          resets = <&reset 0x07 (1 << 15)>;
+          reset-names = "vaux";
+          ranges;
+          numa-node-id = <0>;
+          status = "disabled";
+          usbdrd_dwc3_0: dwc3@50480000 {
+            compatible = "snps,dwc3";
+            reg = <0x0 0x50480000 0x0 0x10000>;
+            #address-cells = <2>;
+            #size-cells = <2>;
+            interrupt-parent = <&plic>;
+            interrupts = <85>;
+            interrupt-names = "peripheral";
+            dr_mode = "peripheral";
+            phy_type = "utmi";
+            maximum-speed = "high-speed";
+            eswin,hsp_sp_csr = <&hsp_sp_csr 0x1044>;
+            snps,dis_enblslpm_quirk;
+            snps,dis-u2-freeclk-exists-quirk;
+            snps,dis_u2_susphy_quirk;
+            snps,dis-del-phy-power-chg-quirk;
+            snps,parkmode-disable-ss-quirk;
+            status = "disabled";
+            numa-node-id = <0>;
+            dma-noncoherent;
+          };
+        };
+    };