@@ -315,6 +315,26 @@ static u8 pca954x_regval(struct pca954x *data, u8 chan)
return 1 << chan;
}
+static void pca954x_reset_assert(struct pca954x *data)
+{
+ if (data->reset_cont)
+ reset_control_assert(data->reset_cont);
+}
+
+static void pca954x_reset_deassert(struct pca954x *data)
+{
+ if (data->reset_cont)
+ reset_control_deassert(data->reset_cont);
+}
+
+static void pca954x_reset_mux(struct pca954x *data)
+{
+ dev_warn(&data->client->dev, "resetting the device\n");
+ pca954x_reset_assert(data);
+ udelay(1);
+ pca954x_reset_deassert(data);
+}
+
static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
{
struct pca954x *data = i2c_mux_priv(muxc);
@@ -328,6 +348,8 @@ static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
ret = pca954x_reg_write(muxc->parent, client, regval);
data->last_chan = ret < 0 ? 0 : regval;
}
+ if (ret == -ETIMEDOUT && (data->reset_cont))
+ pca954x_reset_mux(data);
return ret;
}
@@ -337,6 +359,7 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
struct pca954x *data = i2c_mux_priv(muxc);
struct i2c_client *client = data->client;
s32 idle_state;
+ int ret = 0;
idle_state = READ_ONCE(data->idle_state);
if (idle_state >= 0)
@@ -346,8 +369,10 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
if (idle_state == MUX_IDLE_DISCONNECT) {
/* Deselect active channel */
data->last_chan = 0;
- return pca954x_reg_write(muxc->parent, client,
+ ret = pca954x_reg_write(muxc->parent, client,
data->last_chan);
+ if (ret == -ETIMEDOUT && (data->reset_cont))
+ pca954x_reset_mux(data);
}
/* otherwise leave as-is */
@@ -531,12 +556,6 @@ static int pca954x_get_reset(struct device *dev, struct pca954x *data)
return 0;
}
-static void pca954x_reset_deassert(struct pca954x *data)
-{
- if (data->reset_cont)
- reset_control_deassert(data->reset_cont);
-}
-
/*
* I2C init/probing/exit functions
*/
If the channel selection or deselection times out, it indicates a failure in the mux's I2C subsystem. Without sending a reset pulse, a power-on-reset of the entire device would be required to restore communication. The datasheet specifies a minimum hold time of 4 ns for the reset pulse, but due to the path's capacitance and themux having its own clock, it is recommended to extend this to approximately 1 us. Since reset controller is used, there is no need to take care of other devices sharing the same reset line. Signed-off-by: Wojciech Siudy <wojciech.siudy@nokia.com> --- Changelog: v2: * Removed mail header from the commit log * Decreased reset pulse hold time from 10 to 1 ms v3: * Make this functionality enabled by appropriate property in devicetree v4: * Fix missing condition check from devicetree v5: * Declare dependency of a new property v6: * Don't add any new properties, use reset controller only --- --- drivers/i2c/muxes/i2c-mux-pca954x.c | 33 +++++++++++++++++++++++------ 1 file changed, 26 insertions(+), 7 deletions(-)