Message ID | 20250514-mt8395-dtb-errors-v2-2-d67b9077c59a@collabora.com |
---|---|
State | New |
Headers | show |
Series | mt8395/mt6359: Fix several dtb-check errors | expand |
diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml index 75750c64157c868725c087500ac81be4e282c829..5068617a5146c8a8d61234d83c19d2848d5e708f 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml @@ -97,7 +97,8 @@ properties: maxItems: 1 interrupts: - maxItems: 1 + minItems: 1 + maxItems: 5 clocks: items: @@ -201,6 +202,21 @@ allOf: required: - mediatek,infracfg + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8195-iommu-infra + then: + properties: + interrupts: + minItems: 5 + else: + properties: + interrupts: + maxItems: 1 + - if: # The IOMMUs don't have larbs. not: properties:
The MT8195 Infra IOMMU is currently the only Mediatek IOMMU instance that uses five interrupts instead of one. Update the binding to allow either one or five interrupts, depending on the compatible string. This avoids dtbs_check errors on platforms like the Radxa NIO 12L using the MT8395 SoC: mediatek/mt8395-radxa-nio-12l.dtb: infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0], [0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]] is too long Fixes: 3b5838d1d82e3 ("arm64: dts: mt8195: Add iommu and smi nodes") Signed-off-by: Julien Massot <julien.massot@collabora.com> --- .../devicetree/bindings/iommu/mediatek,iommu.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-)