diff mbox series

[v3,09/10] ASoC: mediatek: mt8196: add machine driver with nau8825

Message ID 20250514081125.24475-10-darren.ye@mediatek.com
State New
Headers show
Series ASoC: mediatek: Add support for MT8196 SoC | expand

Commit Message

Darren Ye (叶飞) May 14, 2025, 8:11 a.m. UTC
From: Darren Ye <darren.ye@mediatek.com>

Add support for mt8196 board with nau8825.

Signed-off-by: Darren Ye <darren.ye@mediatek.com>
---
 sound/soc/mediatek/Kconfig                 |  22 +-
 sound/soc/mediatek/mt8196/Makefile         |   3 +
 sound/soc/mediatek/mt8196/mt8196-nau8825.c | 869 +++++++++++++++++++++
 3 files changed, 893 insertions(+), 1 deletion(-)
 create mode 100644 sound/soc/mediatek/mt8196/mt8196-nau8825.c

Comments

kernel test robot May 15, 2025, 7:27 a.m. UTC | #1
Hi Darren.Ye,

kernel test robot noticed the following build errors:

[auto build test ERROR on broonie-sound/for-next]
[also build test ERROR on broonie-spi/for-next robh/for-next linus/master v6.15-rc6 next-20250514]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Darren-Ye/ASoC-mediatek-common-modify-mtk-afe-platform-driver-for-mt8196/20250514-161921
base:   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
patch link:    https://lore.kernel.org/r/20250514081125.24475-10-darren.ye%40mediatek.com
patch subject: [PATCH v3 09/10] ASoC: mediatek: mt8196: add machine driver with nau8825
config: arm-allmodconfig (https://download.01.org/0day-ci/archive/20250515/202505151544.DAAAOmfW-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250515/202505151544.DAAAOmfW-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505151544.DAAAOmfW-lkp@intel.com/

All errors (new ones prefixed by >>):

>> sound/soc/mediatek/mt8196/mt8196-nau8825.c:451:49: error: 'SND_SOC_DAIFMT_CBS_CFS' undeclared here (not in a function); did you mean 'SND_SOC_DAIFMT_CBP_CFC'?
     451 |                 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
         |                                                 ^~~~~~~~~~~~~~~~~~~~~~
         |                                                 SND_SOC_DAIFMT_CBP_CFC


vim +451 sound/soc/mediatek/mt8196/mt8196-nau8825.c

   245	
   246	/* FE */
   247	SND_SOC_DAILINK_DEFS(playback1,
   248			     DAILINK_COMP_ARRAY(COMP_CPU("DL1")),
   249			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   250			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   251	SND_SOC_DAILINK_DEFS(playback_24ch,
   252			     DAILINK_COMP_ARRAY(COMP_CPU("DL_24CH")),
   253			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   254			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   255	SND_SOC_DAILINK_DEFS(capture0,
   256			     DAILINK_COMP_ARRAY(COMP_CPU("UL0")),
   257			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   258			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   259	SND_SOC_DAILINK_DEFS(capture1,
   260			     DAILINK_COMP_ARRAY(COMP_CPU("UL1")),
   261			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   262			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   263	SND_SOC_DAILINK_DEFS(capture2,
   264			     DAILINK_COMP_ARRAY(COMP_CPU("UL2")),
   265			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   266			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   267	SND_SOC_DAILINK_DEFS(playback_hdmi,
   268			     DAILINK_COMP_ARRAY(COMP_CPU("HDMI")),
   269			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   270			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   271	SND_SOC_DAILINK_DEFS(playback2,
   272			     DAILINK_COMP_ARRAY(COMP_CPU("DL2")),
   273			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   274			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   275	SND_SOC_DAILINK_DEFS(capture_cm0,
   276			     DAILINK_COMP_ARRAY(COMP_CPU("UL_CM0")),
   277			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   278			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   279	/* BE */
   280	SND_SOC_DAILINK_DEFS(ap_dmic,
   281			     DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC")),
   282			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   283			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   284	SND_SOC_DAILINK_DEFS(ap_dmic_ch34,
   285			     DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC_CH34")),
   286			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   287			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   288	SND_SOC_DAILINK_DEFS(ap_dmic_multich,
   289			     DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC_MULTICH")),
   290			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   291			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   292	SND_SOC_DAILINK_DEFS(i2sin6,
   293			     DAILINK_COMP_ARRAY(COMP_CPU("I2SIN6")),
   294			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   295			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   296	SND_SOC_DAILINK_DEFS(i2sout3,
   297			     DAILINK_COMP_ARRAY(COMP_CPU("I2SOUT3")),
   298			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   299			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   300	SND_SOC_DAILINK_DEFS(i2sout4,
   301			     DAILINK_COMP_ARRAY(COMP_CPU("I2SOUT4")),
   302			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   303			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   304	SND_SOC_DAILINK_DEFS(i2sout6,
   305			     DAILINK_COMP_ARRAY(COMP_CPU("I2SOUT6")),
   306			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   307			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   308	SND_SOC_DAILINK_DEFS(tdm_dptx,
   309			     DAILINK_COMP_ARRAY(COMP_CPU("TDM_DPTX")),
   310			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   311			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   312	SND_SOC_DAILINK_DEFS(AFE_SOF_DL_24CH,
   313			     DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL_24CH")),
   314			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   315			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   316	SND_SOC_DAILINK_DEFS(AFE_SOF_DL1,
   317			     DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL1")),
   318			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   319			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   320	SND_SOC_DAILINK_DEFS(AFE_SOF_UL0,
   321			     DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL0")),
   322			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   323			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   324	SND_SOC_DAILINK_DEFS(AFE_SOF_UL1,
   325			     DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL1")),
   326			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   327			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   328	SND_SOC_DAILINK_DEFS(AFE_SOF_UL2,
   329			     DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL2")),
   330			     DAILINK_COMP_ARRAY(COMP_DUMMY()),
   331			     DAILINK_COMP_ARRAY(COMP_EMPTY()));
   332	
   333	static struct snd_soc_dai_link mt8196_nau8825_dai_links[] = {
   334		/*
   335		 * The SOF topology expects PCM streams 0~4 to be available
   336		 * for the SOF PCM streams. Put the SOF BE definitions here
   337		 * so that the PCM device numbers are skipped over.
   338		 * (BE dailinks do not have PCM devices created.)
   339		 */
   340		{
   341			.name = "AFE_SOF_DL_24CH",
   342			.no_pcm = 1,
   343			.playback_only = 1,
   344			.ops = &mt8196_sof_be_ops,
   345			SND_SOC_DAILINK_REG(AFE_SOF_DL_24CH),
   346		},
   347		{
   348			.name = "AFE_SOF_DL1",
   349			.no_pcm = 1,
   350			.playback_only = 1,
   351			.ops = &mt8196_sof_be_ops,
   352			SND_SOC_DAILINK_REG(AFE_SOF_DL1),
   353		},
   354		{
   355			.name = "AFE_SOF_UL0",
   356			.no_pcm = 1,
   357			.capture_only = 1,
   358			.ops = &mt8196_sof_be_ops,
   359			SND_SOC_DAILINK_REG(AFE_SOF_UL0),
   360		},
   361		{
   362			.name = "AFE_SOF_UL1",
   363			.no_pcm = 1,
   364			.capture_only = 1,
   365			.ops = &mt8196_sof_be_ops,
   366			SND_SOC_DAILINK_REG(AFE_SOF_UL1),
   367		},
   368		{
   369			.name = "AFE_SOF_UL2",
   370			.no_pcm = 1,
   371			.capture_only = 1,
   372			.ops = &mt8196_sof_be_ops,
   373			SND_SOC_DAILINK_REG(AFE_SOF_UL2),
   374		},
   375		/* Front End DAI links */
   376		{
   377			.name = "HDMI_FE",
   378			.stream_name = "HDMI Playback",
   379			.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
   380				    SND_SOC_DPCM_TRIGGER_PRE},
   381			.dynamic = 1,
   382			.playback_only = 1,
   383			SND_SOC_DAILINK_REG(playback_hdmi),
   384		},
   385		{
   386			.name = "DL2_FE",
   387			.stream_name = "DL2 Playback",
   388			.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
   389				    SND_SOC_DPCM_TRIGGER_PRE},
   390			.dynamic = 1,
   391			.playback_only = 1,
   392			SND_SOC_DAILINK_REG(playback2),
   393		},
   394		{
   395			.name = "UL_CM0_FE",
   396			.stream_name = "UL_CM0 Capture",
   397			.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
   398				    SND_SOC_DPCM_TRIGGER_PRE},
   399			.dynamic = 1,
   400			.capture_only = 1,
   401			SND_SOC_DAILINK_REG(capture_cm0),
   402		},
   403		{
   404			.name = "DL_24CH_FE",
   405			.stream_name = "DL_24CH Playback",
   406			.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
   407					SND_SOC_DPCM_TRIGGER_PRE},
   408			.dynamic = 1,
   409			.playback_only = 1,
   410			SND_SOC_DAILINK_REG(playback_24ch),
   411		},
   412		{
   413			.name = "DL1_FE",
   414			.stream_name = "DL1 Playback",
   415			.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
   416					SND_SOC_DPCM_TRIGGER_PRE},
   417			.dynamic = 1,
   418			.playback_only = 1,
   419			SND_SOC_DAILINK_REG(playback1),
   420		},
   421		{
   422			.name = "UL0_FE",
   423			.stream_name = "UL0 Capture",
   424			.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
   425					SND_SOC_DPCM_TRIGGER_PRE},
   426			.dynamic = 1,
   427			.capture_only = 1,
   428			SND_SOC_DAILINK_REG(capture0),
   429		},
   430		{
   431			.name = "UL1_FE",
   432			.stream_name = "UL1 Capture",
   433			.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
   434					SND_SOC_DPCM_TRIGGER_PRE},
   435			.dynamic = 1,
   436			.capture_only = 1,
   437			SND_SOC_DAILINK_REG(capture1),
   438		},
   439		{
   440			.name = "UL2_FE",
   441			.stream_name = "UL2 Capture",
   442			.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
   443					SND_SOC_DPCM_TRIGGER_PRE},
   444			.dynamic = 1,
   445			.capture_only = 1,
   446			SND_SOC_DAILINK_REG(capture2),
   447		},
   448		/* Back End DAI links */
   449		{
   450			.name = "I2SIN6_BE",
 > 451			.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
   452				| SND_SOC_DAIFMT_GATED,
   453			.ops = &mt8196_nau8825_i2s_ops,
   454			.no_pcm = 1,
   455			.capture_only = 1,
   456			.ignore_suspend = 1,
   457			.be_hw_params_fixup = mt8196_i2s_hw_params_fixup,
   458			SND_SOC_DAILINK_REG(i2sin6),
   459		},
   460		{
   461			.name = "I2SOUT4_BE",
   462			.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
   463				| SND_SOC_DAIFMT_GATED,
   464			.ops = &mt8196_nau8825_i2s_ops,
   465			.no_pcm = 1,
   466			.playback_only = 1,
   467			.ignore_suspend = 1,
   468			.ignore_pmdown_time = 1,
   469			.be_hw_params_fixup = mt8196_i2s_hw_params_fixup,
   470			SND_SOC_DAILINK_REG(i2sout4),
   471		},
   472		{
   473			.name = "I2SOUT6_BE",
   474			.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
   475				| SND_SOC_DAIFMT_GATED,
   476			.ops = &mt8196_nau8825_i2s_ops,
   477			.no_pcm = 1,
   478			.playback_only = 1,
   479			.ignore_suspend = 1,
   480			.be_hw_params_fixup = mt8196_i2s_hw_params_fixup,
   481			SND_SOC_DAILINK_REG(i2sout6),
   482		},
   483		{
   484			.name = "AP_DMIC_BE",
   485			.no_pcm = 1,
   486			.capture_only = 1,
   487			.ignore_suspend = 1,
   488			SND_SOC_DAILINK_REG(ap_dmic),
   489		},
   490		{
   491			.name = "AP_DMIC_CH34_BE",
   492			.no_pcm = 1,
   493			.capture_only = 1,
   494			.ignore_suspend = 1,
   495			SND_SOC_DAILINK_REG(ap_dmic_ch34),
   496		},
   497		{
   498			.name = "AP_DMIC_MULTICH_BE",
   499			.no_pcm = 1,
   500			.capture_only = 1,
   501			.ignore_suspend = 1,
   502			SND_SOC_DAILINK_REG(ap_dmic_multich),
   503		},
   504		{
   505			.name = "TDM_DPTX_BE",
   506			.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
   507				| SND_SOC_DAIFMT_GATED,
   508			.ops = &mt8196_dptx_ops,
   509			.be_hw_params_fixup = mt8196_dptx_hw_params_fixup,
   510			.no_pcm = 1,
   511			.playback_only = 1,
   512			.ignore_suspend = 1,
   513			SND_SOC_DAILINK_REG(tdm_dptx),
   514		},
   515		{
   516			.name = "I2SOUT3_BE",
   517			.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
   518				| SND_SOC_DAIFMT_GATED,
   519			.ops = &mt8196_nau8825_i2s_ops,
   520			.no_pcm = 1,
   521			.playback_only = 1,
   522			.ignore_suspend = 1,
   523			SND_SOC_DAILINK_REG(i2sout3),
   524		},
   525	};
   526
diff mbox series

Patch

diff --git a/sound/soc/mediatek/Kconfig b/sound/soc/mediatek/Kconfig
index 63d4abebb539..90515f7df2cb 100644
--- a/sound/soc/mediatek/Kconfig
+++ b/sound/soc/mediatek/Kconfig
@@ -328,4 +328,24 @@  config SND_SOC_MT8196
 	  This adds ASoC driver for Mediatek MT8196 boards
 	  that can be used with other codecs.
 	  Select Y if you have such device.
-	  If unsure select "N".
\ No newline at end of file
+	  If unsure select "N".
+
+config SND_SOC_MT8196_NAU8825
+	tristate "ASoc Audio driver for MT8196 with NAU8825 and I2S codec"
+	depends on SND_SOC_MT8196
+	depends on I2C
+	select SND_SOC_HDMI_CODEC
+	select SND_SOC_DMIC
+	select SND_SOC_NAU8315
+	select SND_SOC_NAU8825
+	select SND_SOC_RT5645
+	select SND_SOC_RT5682_I2C
+	select SND_SOC_RT5682S
+	select SND_SOC_TAS2781_COMLIB
+	select SND_SOC_TAS2781_FMWLIB
+	select SND_SOC_TAS2781_I2C
+	help
+	  This adds support for ASoC machine driver for MediaTek MT8196
+	  boards with the NAU8825 and other I2S audio codecs.
+	  Select Y if you have such device.
+	  If unsure select "N".
diff --git a/sound/soc/mediatek/mt8196/Makefile b/sound/soc/mediatek/mt8196/Makefile
index b8a51a53d52a..453279a11313 100644
--- a/sound/soc/mediatek/mt8196/Makefile
+++ b/sound/soc/mediatek/mt8196/Makefile
@@ -13,3 +13,6 @@  snd-soc-mt8196-afe-objs += \
 	mt8196-dai-tdm.o
 
 obj-$(CONFIG_SND_SOC_MT8196) += snd-soc-mt8196-afe.o
+
+# machine driver
+obj-$(CONFIG_SND_SOC_MT8196_NAU8825) += mt8196-nau8825.o
diff --git a/sound/soc/mediatek/mt8196/mt8196-nau8825.c b/sound/soc/mediatek/mt8196/mt8196-nau8825.c
new file mode 100644
index 000000000000..6452484a2777
--- /dev/null
+++ b/sound/soc/mediatek/mt8196/mt8196-nau8825.c
@@ -0,0 +1,869 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  mt8196-nau8825.c  --  mt8196 nau8825 ALSA SoC machine driver
+ *
+ *  Copyright (c) 2024 MediaTek Inc.
+ *  Author: Darren Ye <darren.ye@mediatek.com>
+ */
+
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/jack.h>
+#include <linux/input.h>
+#include <linux/of_device.h>
+
+#include "mtk-afe-platform-driver.h"
+#include "mt8196-afe-common.h"
+#include "mtk-afe-platform-driver.h"
+#include "mtk-soundcard-driver.h"
+#include "mtk-dsp-sof-common.h"
+#include "mtk-soc-card.h"
+
+#include "../../codecs/nau8825.h"
+#include "../../codecs/rt5682s.h"
+
+#define NAU8825_HS_PRESENT	BIT(0)
+#define RT5682S_HS_PRESENT	BIT(1)
+#define RT5650_HS_PRESENT	BIT(2)
+
+/*
+ * Nau88l25
+ */
+#define NAU8825_CODEC_DAI  "nau8825-hifi"
+
+/*
+ * Rt5682s
+ */
+#define RT5682S_CODEC_DAI     "rt5682s-aif1"
+
+/*
+ * Rt5650
+ */
+#define RT5650_CODEC_DAI     "rt5645-aif1"
+
+#define SOF_DMA_DL1 "SOF_DMA_DL1"
+#define SOF_DMA_DL_24CH "SOF_DMA_DL_24CH"
+#define SOF_DMA_UL0 "SOF_DMA_UL0"
+#define SOF_DMA_UL1 "SOF_DMA_UL1"
+#define SOF_DMA_UL2 "SOF_DMA_UL2"
+
+enum mt8196_jacks {
+	MT8196_JACK_HEADSET,
+	MT8196_JACK_DP,
+	MT8196_JACK_HDMI,
+	MT8196_JACK_MAX,
+};
+
+static struct snd_soc_jack_pin mt8196_dp_jack_pins[] = {
+	{
+		.pin = "DP",
+		.mask = SND_JACK_LINEOUT,
+	},
+};
+
+static struct snd_soc_jack_pin mt8196_hdmi_jack_pins[] = {
+	{
+		.pin = "HDMI",
+		.mask = SND_JACK_LINEOUT,
+	},
+};
+
+static struct snd_soc_jack_pin nau8825_jack_pins[] = {
+	{
+		.pin    = "Headphone Jack",
+		.mask   = SND_JACK_HEADPHONE,
+	},
+	{
+		.pin    = "Headset Mic",
+		.mask   = SND_JACK_MICROPHONE,
+	},
+};
+
+static const struct snd_kcontrol_new mt8196_dumb_spk_controls[] = {
+	SOC_DAPM_PIN_SWITCH("Ext Spk"),
+};
+
+static const struct snd_soc_dapm_widget mt8196_dumb_spk_widgets[] = {
+	SND_SOC_DAPM_SPK("Ext Spk", NULL),
+};
+
+static const struct snd_soc_dapm_widget mt8196_nau8825_widgets[] = {
+	SND_SOC_DAPM_HP("Headphone Jack", NULL),
+	SND_SOC_DAPM_MIC("Headset Mic", NULL),
+	SND_SOC_DAPM_SINK("DP"),
+};
+
+static const struct snd_kcontrol_new mt8196_nau8825_controls[] = {
+	SOC_DAPM_PIN_SWITCH("Headphone Jack"),
+	SOC_DAPM_PIN_SWITCH("Headset Mic"),
+};
+
+#define EXT_SPK_AMP_W_NAME "Ext_Speaker_Amp"
+
+static struct snd_soc_card mt8196_nau8825_soc_card;
+
+static const struct snd_soc_dapm_widget mt8196_nau8825_card_widgets[] = {
+	/* dynamic pinctrl */
+	SND_SOC_DAPM_PINCTRL("ETDMIN_SPK_PIN", "aud-gpio-i2sin4-on", "aud-gpio-i2sin4-off"),
+	SND_SOC_DAPM_PINCTRL("ETDMOUT_SPK_PIN", "aud-gpio-i2sout4-on", "aud-gpio-i2sout4-off"),
+	SND_SOC_DAPM_PINCTRL("ETDMIN_HP_PIN", "aud-gpio-i2sin6-on", "aud-gpio-i2sin6-off"),
+	SND_SOC_DAPM_PINCTRL("ETDMOUT_HP_PIN", "aud-gpio-i2sout6-on", "aud-gpio-i2sout6-off"),
+	SND_SOC_DAPM_PINCTRL("ETDMIN_HDMI_PIN", "aud-gpio-i2sin3-on", "aud-gpio-i2sin3-off"),
+	SND_SOC_DAPM_PINCTRL("ETDMOUT_HDMI_PIN", "aud-gpio-i2sout3-on", "aud-gpio-i2sout3-off"),
+	SND_SOC_DAPM_PINCTRL("AP_DMIC0_PIN", "aud-gpio-ap-dmic-on", "aud-gpio-ap-dmic-off"),
+	SND_SOC_DAPM_PINCTRL("AP_DMIC1_PIN", "aud-gpio-ap-dmic1-on", "aud-gpio-ap-dmic1-off"),
+};
+
+static const struct snd_soc_dapm_route mt8196_nau8825_card_routes[] = {
+};
+
+static const struct snd_kcontrol_new mt8196_nau8825_card_controls[] = {
+	SOC_DAPM_PIN_SWITCH(EXT_SPK_AMP_W_NAME),
+};
+
+/*
+ * define mtk_spk_i2s_mck node in dts when need mclk,
+ * BE i2s need assign snd_soc_ops = mt8196_nau8825_i2s_ops
+ */
+static int mt8196_nau8825_i2s_hw_params(struct snd_pcm_substream *substream,
+					struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	unsigned int rate = params_rate(params);
+	unsigned int mclk_fs_ratio = 128;
+	unsigned int mclk_fs = rate * mclk_fs_ratio;
+	struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
+
+	return snd_soc_dai_set_sysclk(cpu_dai,
+				      0, mclk_fs, SND_SOC_CLOCK_OUT);
+}
+
+static const struct snd_soc_ops mt8196_nau8825_i2s_ops = {
+	.hw_params = mt8196_nau8825_i2s_hw_params,
+};
+
+static int mt8196_dptx_hw_params(struct snd_pcm_substream *substream,
+				 struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	unsigned int rate = params_rate(params);
+	unsigned int mclk_fs_ratio = 256;
+	unsigned int mclk_fs = rate * mclk_fs_ratio;
+	struct snd_soc_dai *dai = snd_soc_rtd_to_cpu(rtd, 0);
+
+	return snd_soc_dai_set_sysclk(dai, 0, mclk_fs, SND_SOC_CLOCK_OUT);
+}
+
+static const struct snd_soc_ops mt8196_dptx_ops = {
+	.hw_params = mt8196_dptx_hw_params,
+};
+
+static int mt8196_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+				       struct snd_pcm_hw_params *params)
+{
+	dev_info(rtd->dev, "fix format to 32bit\n");
+
+	/* fix BE i2s format to 32bit, clean param mask first */
+	snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
+			     0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST);
+
+	params_set_format(params, SNDRV_PCM_FORMAT_S32_LE);
+
+	return 0;
+}
+
+static int mt8196_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+				      struct snd_pcm_hw_params *params)
+{
+	dev_info(rtd->dev, "fix format to 32bit\n");
+
+	/* fix BE i2s format to 32bit, clean param mask first */
+	snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
+			     0, SNDRV_PCM_FORMAT_LAST);
+
+	params_set_format(params, SNDRV_PCM_FORMAT_S32_LE);
+	return 0;
+}
+
+static int mt8196_sof_be_hw_params(struct snd_pcm_substream *substream,
+				   struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
+	struct snd_soc_component *cmpnt_afe = NULL;
+	struct snd_soc_pcm_runtime *runtime;
+
+	/* find afe component */
+	for_each_card_rtds(rtd->card, runtime) {
+		cmpnt_afe = snd_soc_rtdcom_lookup(runtime, AFE_PCM_NAME);
+		if (cmpnt_afe) {
+			dev_info(rtd->dev, "component->name: %s\n", cmpnt_afe->name);
+			break;
+		}
+	}
+
+	if (cmpnt_afe && !pm_runtime_active(cmpnt_afe->dev)) {
+		dev_err(rtd->dev, "afe pm runtime is not active!!\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static const struct snd_soc_ops mt8196_sof_be_ops = {
+	.hw_params = mt8196_sof_be_hw_params,
+};
+
+static const struct sof_conn_stream g_sof_conn_streams[] = {
+	{
+		.sof_link = "AFE_SOF_DL1",
+		.sof_dma = SOF_DMA_DL1,
+		.stream_dir = SNDRV_PCM_STREAM_PLAYBACK
+	},
+	{
+		.sof_link = "AFE_SOF_DL_24CH",
+		.sof_dma = SOF_DMA_DL_24CH,
+		.stream_dir = SNDRV_PCM_STREAM_PLAYBACK
+	},
+	{
+		.sof_link = "AFE_SOF_UL0",
+		.sof_dma = SOF_DMA_UL0,
+		.stream_dir = SNDRV_PCM_STREAM_CAPTURE
+	},
+	{
+		.sof_link = "AFE_SOF_UL1",
+		.sof_dma = SOF_DMA_UL1,
+		.stream_dir = SNDRV_PCM_STREAM_CAPTURE
+	},
+	{
+		.sof_link = "AFE_SOF_UL2",
+		.sof_dma = SOF_DMA_UL2,
+		.stream_dir = SNDRV_PCM_STREAM_CAPTURE
+	},
+};
+
+/* FE */
+SND_SOC_DAILINK_DEFS(playback1,
+		     DAILINK_COMP_ARRAY(COMP_CPU("DL1")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(playback_24ch,
+		     DAILINK_COMP_ARRAY(COMP_CPU("DL_24CH")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(capture0,
+		     DAILINK_COMP_ARRAY(COMP_CPU("UL0")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(capture1,
+		     DAILINK_COMP_ARRAY(COMP_CPU("UL1")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(capture2,
+		     DAILINK_COMP_ARRAY(COMP_CPU("UL2")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(playback_hdmi,
+		     DAILINK_COMP_ARRAY(COMP_CPU("HDMI")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(playback2,
+		     DAILINK_COMP_ARRAY(COMP_CPU("DL2")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(capture_cm0,
+		     DAILINK_COMP_ARRAY(COMP_CPU("UL_CM0")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+/* BE */
+SND_SOC_DAILINK_DEFS(ap_dmic,
+		     DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(ap_dmic_ch34,
+		     DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC_CH34")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(ap_dmic_multich,
+		     DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC_MULTICH")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(i2sin6,
+		     DAILINK_COMP_ARRAY(COMP_CPU("I2SIN6")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(i2sout3,
+		     DAILINK_COMP_ARRAY(COMP_CPU("I2SOUT3")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(i2sout4,
+		     DAILINK_COMP_ARRAY(COMP_CPU("I2SOUT4")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(i2sout6,
+		     DAILINK_COMP_ARRAY(COMP_CPU("I2SOUT6")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(tdm_dptx,
+		     DAILINK_COMP_ARRAY(COMP_CPU("TDM_DPTX")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(AFE_SOF_DL_24CH,
+		     DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL_24CH")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(AFE_SOF_DL1,
+		     DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL1")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(AFE_SOF_UL0,
+		     DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL0")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(AFE_SOF_UL1,
+		     DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL1")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(AFE_SOF_UL2,
+		     DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL2")),
+		     DAILINK_COMP_ARRAY(COMP_DUMMY()),
+		     DAILINK_COMP_ARRAY(COMP_EMPTY()));
+
+static struct snd_soc_dai_link mt8196_nau8825_dai_links[] = {
+	/*
+	 * The SOF topology expects PCM streams 0~4 to be available
+	 * for the SOF PCM streams. Put the SOF BE definitions here
+	 * so that the PCM device numbers are skipped over.
+	 * (BE dailinks do not have PCM devices created.)
+	 */
+	{
+		.name = "AFE_SOF_DL_24CH",
+		.no_pcm = 1,
+		.playback_only = 1,
+		.ops = &mt8196_sof_be_ops,
+		SND_SOC_DAILINK_REG(AFE_SOF_DL_24CH),
+	},
+	{
+		.name = "AFE_SOF_DL1",
+		.no_pcm = 1,
+		.playback_only = 1,
+		.ops = &mt8196_sof_be_ops,
+		SND_SOC_DAILINK_REG(AFE_SOF_DL1),
+	},
+	{
+		.name = "AFE_SOF_UL0",
+		.no_pcm = 1,
+		.capture_only = 1,
+		.ops = &mt8196_sof_be_ops,
+		SND_SOC_DAILINK_REG(AFE_SOF_UL0),
+	},
+	{
+		.name = "AFE_SOF_UL1",
+		.no_pcm = 1,
+		.capture_only = 1,
+		.ops = &mt8196_sof_be_ops,
+		SND_SOC_DAILINK_REG(AFE_SOF_UL1),
+	},
+	{
+		.name = "AFE_SOF_UL2",
+		.no_pcm = 1,
+		.capture_only = 1,
+		.ops = &mt8196_sof_be_ops,
+		SND_SOC_DAILINK_REG(AFE_SOF_UL2),
+	},
+	/* Front End DAI links */
+	{
+		.name = "HDMI_FE",
+		.stream_name = "HDMI Playback",
+		.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
+			    SND_SOC_DPCM_TRIGGER_PRE},
+		.dynamic = 1,
+		.playback_only = 1,
+		SND_SOC_DAILINK_REG(playback_hdmi),
+	},
+	{
+		.name = "DL2_FE",
+		.stream_name = "DL2 Playback",
+		.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
+			    SND_SOC_DPCM_TRIGGER_PRE},
+		.dynamic = 1,
+		.playback_only = 1,
+		SND_SOC_DAILINK_REG(playback2),
+	},
+	{
+		.name = "UL_CM0_FE",
+		.stream_name = "UL_CM0 Capture",
+		.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
+			    SND_SOC_DPCM_TRIGGER_PRE},
+		.dynamic = 1,
+		.capture_only = 1,
+		SND_SOC_DAILINK_REG(capture_cm0),
+	},
+	{
+		.name = "DL_24CH_FE",
+		.stream_name = "DL_24CH Playback",
+		.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
+				SND_SOC_DPCM_TRIGGER_PRE},
+		.dynamic = 1,
+		.playback_only = 1,
+		SND_SOC_DAILINK_REG(playback_24ch),
+	},
+	{
+		.name = "DL1_FE",
+		.stream_name = "DL1 Playback",
+		.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
+				SND_SOC_DPCM_TRIGGER_PRE},
+		.dynamic = 1,
+		.playback_only = 1,
+		SND_SOC_DAILINK_REG(playback1),
+	},
+	{
+		.name = "UL0_FE",
+		.stream_name = "UL0 Capture",
+		.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
+				SND_SOC_DPCM_TRIGGER_PRE},
+		.dynamic = 1,
+		.capture_only = 1,
+		SND_SOC_DAILINK_REG(capture0),
+	},
+	{
+		.name = "UL1_FE",
+		.stream_name = "UL1 Capture",
+		.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
+				SND_SOC_DPCM_TRIGGER_PRE},
+		.dynamic = 1,
+		.capture_only = 1,
+		SND_SOC_DAILINK_REG(capture1),
+	},
+	{
+		.name = "UL2_FE",
+		.stream_name = "UL2 Capture",
+		.trigger = {SND_SOC_DPCM_TRIGGER_PRE,
+				SND_SOC_DPCM_TRIGGER_PRE},
+		.dynamic = 1,
+		.capture_only = 1,
+		SND_SOC_DAILINK_REG(capture2),
+	},
+	/* Back End DAI links */
+	{
+		.name = "I2SIN6_BE",
+		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+			| SND_SOC_DAIFMT_GATED,
+		.ops = &mt8196_nau8825_i2s_ops,
+		.no_pcm = 1,
+		.capture_only = 1,
+		.ignore_suspend = 1,
+		.be_hw_params_fixup = mt8196_i2s_hw_params_fixup,
+		SND_SOC_DAILINK_REG(i2sin6),
+	},
+	{
+		.name = "I2SOUT4_BE",
+		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+			| SND_SOC_DAIFMT_GATED,
+		.ops = &mt8196_nau8825_i2s_ops,
+		.no_pcm = 1,
+		.playback_only = 1,
+		.ignore_suspend = 1,
+		.ignore_pmdown_time = 1,
+		.be_hw_params_fixup = mt8196_i2s_hw_params_fixup,
+		SND_SOC_DAILINK_REG(i2sout4),
+	},
+	{
+		.name = "I2SOUT6_BE",
+		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+			| SND_SOC_DAIFMT_GATED,
+		.ops = &mt8196_nau8825_i2s_ops,
+		.no_pcm = 1,
+		.playback_only = 1,
+		.ignore_suspend = 1,
+		.be_hw_params_fixup = mt8196_i2s_hw_params_fixup,
+		SND_SOC_DAILINK_REG(i2sout6),
+	},
+	{
+		.name = "AP_DMIC_BE",
+		.no_pcm = 1,
+		.capture_only = 1,
+		.ignore_suspend = 1,
+		SND_SOC_DAILINK_REG(ap_dmic),
+	},
+	{
+		.name = "AP_DMIC_CH34_BE",
+		.no_pcm = 1,
+		.capture_only = 1,
+		.ignore_suspend = 1,
+		SND_SOC_DAILINK_REG(ap_dmic_ch34),
+	},
+	{
+		.name = "AP_DMIC_MULTICH_BE",
+		.no_pcm = 1,
+		.capture_only = 1,
+		.ignore_suspend = 1,
+		SND_SOC_DAILINK_REG(ap_dmic_multich),
+	},
+	{
+		.name = "TDM_DPTX_BE",
+		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+			| SND_SOC_DAIFMT_GATED,
+		.ops = &mt8196_dptx_ops,
+		.be_hw_params_fixup = mt8196_dptx_hw_params_fixup,
+		.no_pcm = 1,
+		.playback_only = 1,
+		.ignore_suspend = 1,
+		SND_SOC_DAILINK_REG(tdm_dptx),
+	},
+	{
+		.name = "I2SOUT3_BE",
+		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+			| SND_SOC_DAIFMT_GATED,
+		.ops = &mt8196_nau8825_i2s_ops,
+		.no_pcm = 1,
+		.playback_only = 1,
+		.ignore_suspend = 1,
+		SND_SOC_DAILINK_REG(i2sout3),
+	},
+};
+
+static int mt8196_dumb_amp_init(struct snd_soc_pcm_runtime *rtd)
+{
+	struct snd_soc_card *card = rtd->card;
+	int ret = 0;
+
+	ret = snd_soc_dapm_new_controls(&card->dapm, mt8196_dumb_spk_widgets,
+					ARRAY_SIZE(mt8196_dumb_spk_widgets));
+	if (ret) {
+		dev_err(rtd->dev, "unable to add Dumb Speaker dapm, ret %d\n", ret);
+		return ret;
+	}
+
+	ret = snd_soc_add_card_controls(card, mt8196_dumb_spk_controls,
+					ARRAY_SIZE(mt8196_dumb_spk_controls));
+	if (ret) {
+		dev_err(rtd->dev, "unable to add Dumb card controls, ret %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int mt8196_dptx_codec_init(struct snd_soc_pcm_runtime *rtd)
+{
+	struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card);
+	struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8196_JACK_DP];
+	struct snd_soc_component *component = snd_soc_rtd_to_codec(rtd, 0)->component;
+	int ret = 0;
+
+	ret = snd_soc_card_jack_new_pins(rtd->card, "DP Jack", SND_JACK_LINEOUT,
+					 jack, mt8196_dp_jack_pins,
+					 ARRAY_SIZE(mt8196_dp_jack_pins));
+	if (ret) {
+		dev_err(rtd->dev, "new jack failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = snd_soc_component_set_jack(component, jack, NULL);
+	if (ret) {
+		dev_err(rtd->dev, "set jack failed on %s (ret=%d)\n",
+			component->name, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int mt8196_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd)
+{
+	struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card);
+	struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8196_JACK_HDMI];
+	struct snd_soc_component *component = snd_soc_rtd_to_codec(rtd, 0)->component;
+	int ret = 0;
+
+	ret = snd_soc_card_jack_new_pins(rtd->card, "HDMI Jack", SND_JACK_LINEOUT,
+					 jack, mt8196_hdmi_jack_pins,
+					 ARRAY_SIZE(mt8196_hdmi_jack_pins));
+	if (ret) {
+		dev_err(rtd->dev, "new jack failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = snd_soc_component_set_jack(component, jack, NULL);
+	if (ret) {
+		dev_err(rtd->dev, "set jack failed on %s (ret=%d)\n",
+			component->name, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int mt8196_headset_codec_init(struct snd_soc_pcm_runtime *rtd)
+{
+	struct snd_soc_card *card = rtd->card;
+	struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card);
+	struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8196_JACK_HEADSET];
+	struct snd_soc_component *component = snd_soc_rtd_to_codec(rtd, 0)->component;
+	int ret;
+	int type;
+
+	ret = snd_soc_dapm_new_controls(&card->dapm, mt8196_nau8825_widgets,
+					ARRAY_SIZE(mt8196_nau8825_widgets));
+	if (ret) {
+		dev_err(rtd->dev, "unable to add nau8825 card widget, ret %d\n", ret);
+		return ret;
+	}
+
+	ret = snd_soc_add_card_controls(card, mt8196_nau8825_controls,
+					ARRAY_SIZE(mt8196_nau8825_controls));
+	if (ret) {
+		dev_err(rtd->dev, "unable to add nau8825 card controls, ret %d\n", ret);
+		return ret;
+	}
+
+	ret = snd_soc_card_jack_new_pins(rtd->card, "Headset Jack",
+					 SND_JACK_HEADSET | SND_JACK_BTN_0 |
+					 SND_JACK_BTN_1 | SND_JACK_BTN_2 |
+					 SND_JACK_BTN_3,
+					 jack,
+					 nau8825_jack_pins,
+					 ARRAY_SIZE(nau8825_jack_pins));
+	if (ret) {
+		dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret);
+		return ret;
+	}
+
+	snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
+	snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND);
+	snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP);
+	snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN);
+
+	type = SND_JACK_HEADSET | SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2 | SND_JACK_BTN_3;
+	ret = snd_soc_component_set_jack(component, jack, (void *)&type);
+
+	if (ret) {
+		dev_err(rtd->dev, "Headset Jack call-back failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+};
+
+static void mt8196_headset_codec_exit(struct snd_soc_pcm_runtime *rtd)
+{
+	struct snd_soc_component *component = snd_soc_rtd_to_codec(rtd, 0)->component;
+
+	snd_soc_component_set_jack(component, NULL, NULL);
+}
+
+static int mt8196_nau8825_hw_params(struct snd_pcm_substream *substream,
+				    struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
+	struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
+	unsigned int rate = params_rate(params);
+	unsigned int bit_width = params_width(params);
+	int clk_freq, ret;
+
+	clk_freq = rate * 2 * bit_width;
+
+	/* Configure clock for codec */
+	ret = snd_soc_dai_set_sysclk(codec_dai, NAU8825_CLK_FLL_BLK, 0,
+				     SND_SOC_CLOCK_IN);
+	if (ret < 0) {
+		dev_err(codec_dai->dev, "can't set BCLK clock %d\n", ret);
+		return ret;
+	}
+
+	/* Configure pll for codec */
+	ret = snd_soc_dai_set_pll(codec_dai, 0, 0, clk_freq,
+				  params_rate(params) * 256);
+	if (ret < 0) {
+		dev_err(codec_dai->dev, "can't set BCLK: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct snd_soc_ops mt8196_nau8825_ops = {
+	.hw_params = mt8196_nau8825_hw_params,
+};
+
+static int mt8196_rt5682s_i2s_hw_params(struct snd_pcm_substream *substream,
+					struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_card *card = rtd->card;
+	struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
+	struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
+	unsigned int rate = params_rate(params);
+	int bitwidth;
+	int ret;
+
+	bitwidth = snd_pcm_format_width(params_format(params));
+	if (bitwidth < 0) {
+		dev_err(card->dev, "invalid bit width: %d\n", bitwidth);
+		return bitwidth;
+	}
+
+	ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth);
+	if (ret) {
+		dev_err(card->dev, "failed to set tdm slot\n");
+		return ret;
+	}
+
+	ret = snd_soc_dai_set_pll(codec_dai, RT5682S_PLL1, RT5682S_PLL_S_BCLK1,
+				  rate * 32, rate * 512);
+	if (ret) {
+		dev_err(card->dev, "failed to set pll\n");
+		return ret;
+	}
+
+	dev_info(card->dev, "%s set mclk rate: %d\n", __func__, rate * 512);
+
+	ret = snd_soc_dai_set_sysclk(codec_dai, RT5682S_SCLK_S_MCLK,
+				     rate * 512, SND_SOC_CLOCK_IN);
+	if (ret) {
+		dev_err(card->dev, "failed to set sysclk\n");
+		return ret;
+	}
+
+	return snd_soc_dai_set_sysclk(cpu_dai, 0, rate * 512,
+				      SND_SOC_CLOCK_OUT);
+}
+
+static const struct snd_soc_ops mt8196_rt5682s_i2s_ops = {
+	.hw_params = mt8196_rt5682s_i2s_hw_params,
+};
+
+static int mt8196_nau8825_soc_card_probe(struct mtk_soc_card_data *soc_card_data, bool legacy)
+{
+	struct snd_soc_card *card = soc_card_data->card_data->card;
+	struct snd_soc_dai_link *dai_link;
+	bool init_nau8825 = false;
+	bool init_rt5682s = false;
+	bool init_rt5650 = false;
+	bool init_dumb = false;
+	int i;
+
+	dev_info(card->dev, "legacy: %d\n", legacy);
+
+	for_each_card_prelinks(card, i, dai_link) {
+		if (strcmp(dai_link->name, "TDM_DPTX_BE") == 0) {
+			if (dai_link->num_codecs &&
+			    strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai"))
+				dai_link->init = mt8196_dptx_codec_init;
+		} else if (strcmp(dai_link->name, "I2SOUT3_BE") == 0) {
+			if (dai_link->num_codecs &&
+			    strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai"))
+				dai_link->init = mt8196_hdmi_codec_init;
+		} else if (strcmp(dai_link->name, "I2SOUT6_BE") == 0 ||
+			   strcmp(dai_link->name, "I2SIN6_BE") == 0) {
+			if (!strcmp(dai_link->codecs->dai_name, NAU8825_CODEC_DAI)) {
+				dai_link->ops = &mt8196_nau8825_ops;
+				if (!init_nau8825) {
+					dai_link->init = mt8196_headset_codec_init;
+					dai_link->exit = mt8196_headset_codec_exit;
+					init_nau8825 = true;
+				}
+			} else if (!strcmp(dai_link->codecs->dai_name, RT5682S_CODEC_DAI)) {
+				dai_link->ops = &mt8196_rt5682s_i2s_ops;
+				if (!init_rt5682s) {
+					dai_link->init = mt8196_headset_codec_init;
+					dai_link->exit = mt8196_headset_codec_exit;
+					init_rt5682s = true;
+				}
+			} else if (!strcmp(dai_link->codecs->dai_name, RT5650_CODEC_DAI)) {
+				dai_link->ops = &mt8196_rt5682s_i2s_ops;
+				if (!init_rt5650) {
+					dai_link->init = mt8196_headset_codec_init;
+					dai_link->exit = mt8196_headset_codec_exit;
+					init_rt5650 = true;
+				}
+			} else {
+				if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) {
+					if (!init_dumb) {
+						dai_link->init = mt8196_dumb_amp_init;
+						init_dumb = true;
+					}
+				}
+			}
+		}
+	}
+
+	return 0;
+}
+
+static const struct mtk_sof_priv mt8196_sof_priv = {
+	.conn_streams = g_sof_conn_streams,
+	.num_streams = ARRAY_SIZE(g_sof_conn_streams),
+};
+
+static struct snd_soc_card mt8196_nau8825_soc_card = {
+	.owner = THIS_MODULE,
+	.dai_link = mt8196_nau8825_dai_links,
+	.num_links = ARRAY_SIZE(mt8196_nau8825_dai_links),
+	.dapm_widgets = mt8196_nau8825_card_widgets,
+	.num_dapm_widgets = ARRAY_SIZE(mt8196_nau8825_card_widgets),
+	.dapm_routes = mt8196_nau8825_card_routes,
+	.num_dapm_routes = ARRAY_SIZE(mt8196_nau8825_card_routes),
+	.controls = mt8196_nau8825_card_controls,
+	.num_controls = ARRAY_SIZE(mt8196_nau8825_card_controls),
+};
+
+static const struct mtk_soundcard_pdata mt8196_nau8825_card = {
+	.card_name = "mt8196_nau8825",
+	.card_data = &(struct mtk_platform_card_data) {
+		.card = &mt8196_nau8825_soc_card,
+		.num_jacks = MT8196_JACK_MAX,
+		.flags = NAU8825_HS_PRESENT
+	},
+	.sof_priv = &mt8196_sof_priv,
+	.soc_probe = mt8196_nau8825_soc_card_probe,
+};
+
+static const struct mtk_soundcard_pdata mt8196_rt5682s_card = {
+	.card_name = "mt8196_rt5682s",
+	.card_data = &(struct mtk_platform_card_data) {
+		.card = &mt8196_nau8825_soc_card,
+		.num_jacks = MT8196_JACK_MAX,
+		.flags = RT5682S_HS_PRESENT
+	},
+	.sof_priv = &mt8196_sof_priv,
+	.soc_probe = mt8196_nau8825_soc_card_probe,
+};
+
+static const struct mtk_soundcard_pdata mt8196_rt5650_card = {
+	.card_name = "mt8196_rt5650",
+	.card_data = &(struct mtk_platform_card_data) {
+		.card = &mt8196_nau8825_soc_card,
+		.num_jacks = MT8196_JACK_MAX,
+		.flags = RT5650_HS_PRESENT
+	},
+	.sof_priv = &mt8196_sof_priv,
+	.soc_probe = mt8196_nau8825_soc_card_probe,
+};
+
+static const struct of_device_id mt8196_nau8825_dt_match[] = {
+	{.compatible = "mediatek,mt8196-nau8825-sound", .data = &mt8196_nau8825_card,},
+	{.compatible = "mediatek,mt8196-rt5682s-sound", .data = &mt8196_rt5682s_card,},
+	{.compatible = "mediatek,mt8196-rt5650-sound", .data = &mt8196_rt5650_card,},
+	{}
+};
+MODULE_DEVICE_TABLE(of, mt8196_nau8825_dt_match);
+
+static struct platform_driver mt8196_nau8825_driver = {
+	.driver = {
+		.name = "mt8196-nau8825",
+		.of_match_table = mt8196_nau8825_dt_match,
+		.pm = &snd_soc_pm_ops,
+	},
+	.probe = mtk_soundcard_common_probe,
+};
+module_platform_driver(mt8196_nau8825_driver);
+
+/* Module information */
+MODULE_DESCRIPTION("MT8196 nau8825 ALSA SoC machine driver");
+MODULE_AUTHOR("Darren Ye <darren.ye@mediatek.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("mt8196 nau8825 soc card");
+