@@ -4274,6 +4274,8 @@ struct rtw89_chip_info {
u32 rsvd_ple_ofst;
const struct rtw89_hfc_param_ini *hfc_param_ini_pcie;
const struct rtw89_dle_mem *dle_mem_pcie;
+ const struct rtw89_dle_mem *dle_mem_usb2;
+ const struct rtw89_dle_mem *dle_mem_usb3;
u8 wde_qempty_acq_grpnum;
u8 wde_qempty_mgq_grpsel;
u32 rf_base_addr[2];
@@ -1646,6 +1646,8 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
/* 8852C PCIE SCC */
.wde_size19 = {RTW89_WDE_PG_64, 3328, 0,},
.wde_size23 = {RTW89_WDE_PG_64, 1022, 2,},
+ /* 8852B USB2.0/USB3.0 SCC */
+ .wde_size25 = {RTW89_WDE_PG_64, 162, 94,},
/* PCIE */
.ple_size0 = {RTW89_PLE_PG_128, 1520, 16,},
.ple_size0_v1 = {RTW89_PLE_PG_128, 2688, 240, 212992,},
@@ -1661,6 +1663,10 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
.ple_size18 = {RTW89_PLE_PG_128, 2544, 16,},
/* 8852C PCIE SCC */
.ple_size19 = {RTW89_PLE_PG_128, 1904, 16,},
+ /* 8852B USB2.0 SCC*/
+ .ple_size32 = {RTW89_PLE_PG_128, 620, 20,},
+ /* 8852B USB3.0 SCC*/
+ .ple_size33 = {RTW89_PLE_PG_128, 632, 8,},
/* PCIE 64 */
.wde_qt0 = {3792, 196, 0, 107,},
.wde_qt0_v1 = {3302, 6, 0, 20,},
@@ -1675,6 +1681,8 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
/* 8852C PCIE SCC */
.wde_qt18 = {3228, 60, 0, 40,},
.wde_qt23 = {958, 48, 0, 16,},
+ /* 8852B USB2.0/USB3.0 SCC*/
+ .wde_qt25 = {152, 2, 0, 8,},
.ple_qt0 = {320, 320, 32, 16, 13, 13, 292, 292, 64, 18, 1, 4, 0,},
.ple_qt1 = {320, 320, 32, 16, 1316, 1316, 1595, 1595, 1367, 1321, 1, 1307, 0,},
/* PCIE SCC */
@@ -1698,6 +1706,13 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
/* PCIE 64 */
.ple_qt58 = {147, 0, 16, 20, 157, 13, 229, 0, 172, 14, 24, 0,},
.ple_qt59 = {147, 0, 32, 20, 1860, 13, 2025, 0, 1879, 14, 24, 0,},
+ /* USB2.0 52B SCC */
+ .ple_qt72 = {130, 0, 16, 48, 4, 13, 322, 0, 32, 14, 8, 0, 0,},
+ /* USB2.0 52B 92K*/
+ .ple_qt73 = {130, 0, 32, 48, 37, 13, 355, 0, 65, 14, 24, 0, 0,},
+ /* USB3.0 52B 92K*/
+ .ple_qt74 = {286, 0, 16, 48, 4, 13, 178, 0, 32, 14, 8, 0, 0,},
+ .ple_qt75 = {286, 0, 32, 48, 37, 13, 211, 0, 65, 14, 24, 0, 0,},
/* 8852A PCIE WOW */
.ple_qt_52a_wow = {264, 0, 32, 20, 64, 13, 1005, 0, 64, 128, 120,},
/* 8852B PCIE WOW */
@@ -907,6 +907,7 @@ struct rtw89_mac_size_set {
const struct rtw89_dle_size wde_size18;
const struct rtw89_dle_size wde_size19;
const struct rtw89_dle_size wde_size23;
+ const struct rtw89_dle_size wde_size25;
const struct rtw89_dle_size ple_size0;
const struct rtw89_dle_size ple_size0_v1;
const struct rtw89_dle_size ple_size3_v1;
@@ -916,6 +917,8 @@ struct rtw89_mac_size_set {
const struct rtw89_dle_size ple_size9;
const struct rtw89_dle_size ple_size18;
const struct rtw89_dle_size ple_size19;
+ const struct rtw89_dle_size ple_size32;
+ const struct rtw89_dle_size ple_size33;
const struct rtw89_wde_quota wde_qt0;
const struct rtw89_wde_quota wde_qt0_v1;
const struct rtw89_wde_quota wde_qt4;
@@ -924,6 +927,7 @@ struct rtw89_mac_size_set {
const struct rtw89_wde_quota wde_qt17;
const struct rtw89_wde_quota wde_qt18;
const struct rtw89_wde_quota wde_qt23;
+ const struct rtw89_wde_quota wde_qt25;
const struct rtw89_ple_quota ple_qt0;
const struct rtw89_ple_quota ple_qt1;
const struct rtw89_ple_quota ple_qt4;
@@ -938,6 +942,10 @@ struct rtw89_mac_size_set {
const struct rtw89_ple_quota ple_qt57;
const struct rtw89_ple_quota ple_qt58;
const struct rtw89_ple_quota ple_qt59;
+ const struct rtw89_ple_quota ple_qt72;
+ const struct rtw89_ple_quota ple_qt73;
+ const struct rtw89_ple_quota ple_qt74;
+ const struct rtw89_ple_quota ple_qt75;
const struct rtw89_ple_quota ple_qt_52a_wow;
const struct rtw89_ple_quota ple_qt_52b_wow;
const struct rtw89_ple_quota ple_qt_52bt_wow;
@@ -68,6 +68,32 @@ static const struct rtw89_dle_mem rtw8851b_dle_mem_pcie[] = {
NULL},
};
+static const struct rtw89_dle_mem rtw8851b_dle_mem_usb2[] = {
+ [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size25,
+ &rtw89_mac_size.ple_size32, &rtw89_mac_size.wde_qt25,
+ &rtw89_mac_size.wde_qt25, &rtw89_mac_size.ple_qt72,
+ &rtw89_mac_size.ple_qt73},
+ [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size9,
+ &rtw89_mac_size.ple_size8, &rtw89_mac_size.wde_qt4,
+ &rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13,
+ &rtw89_mac_size.ple_qt13},
+ [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL,
+ NULL},
+};
+
+static const struct rtw89_dle_mem rtw8851b_dle_mem_usb3[] = {
+ [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size25,
+ &rtw89_mac_size.ple_size33, &rtw89_mac_size.wde_qt25,
+ &rtw89_mac_size.wde_qt25, &rtw89_mac_size.ple_qt74,
+ &rtw89_mac_size.ple_qt75},
+ [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size9,
+ &rtw89_mac_size.ple_size8, &rtw89_mac_size.wde_qt4,
+ &rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13,
+ &rtw89_mac_size.ple_qt13},
+ [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL,
+ NULL},
+};
+
static const struct rtw89_reg3_def rtw8851b_btc_preagc_en_defs[] = {
{0x46D0, GENMASK(1, 0), 0x3},
{0x4AD4, GENMASK(31, 0), 0xf},
@@ -2466,6 +2492,8 @@ const struct rtw89_chip_info rtw8851b_chip_info = {
.rsvd_ple_ofst = 0x2f800,
.hfc_param_ini_pcie = rtw8851b_hfc_param_ini_pcie,
.dle_mem_pcie = rtw8851b_dle_mem_pcie,
+ .dle_mem_usb2 = rtw8851b_dle_mem_usb2,
+ .dle_mem_usb3 = rtw8851b_dle_mem_usb3,
.wde_qempty_acq_grpnum = 4,
.wde_qempty_mgq_grpsel = 4,
.rf_base_addr = {0xe000},
@@ -2185,6 +2185,8 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
.rsvd_ple_ofst = 0x6f800,
.hfc_param_ini_pcie = rtw8852a_hfc_param_ini_pcie,
.dle_mem_pcie = rtw8852a_dle_mem_pcie,
+ .dle_mem_usb2 = NULL,
+ .dle_mem_usb3 = NULL,
.wde_qempty_acq_grpnum = 16,
.wde_qempty_mgq_grpsel = 16,
.rf_base_addr = {0xc000, 0xd000},
@@ -821,6 +821,8 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
.rsvd_ple_ofst = 0x2f800,
.hfc_param_ini_pcie = rtw8852b_hfc_param_ini_pcie,
.dle_mem_pcie = rtw8852b_dle_mem_pcie,
+ .dle_mem_usb2 = NULL,
+ .dle_mem_usb3 = NULL,
.wde_qempty_acq_grpnum = 4,
.wde_qempty_mgq_grpsel = 4,
.rf_base_addr = {0xe000, 0xf000},
@@ -755,6 +755,8 @@ const struct rtw89_chip_info rtw8852bt_chip_info = {
.rsvd_ple_ofst = 0x6f800,
.hfc_param_ini_pcie = rtw8852bt_hfc_param_ini_pcie,
.dle_mem_pcie = rtw8852bt_dle_mem_pcie,
+ .dle_mem_usb2 = NULL,
+ .dle_mem_usb3 = NULL,
.wde_qempty_acq_grpnum = 4,
.wde_qempty_mgq_grpsel = 4,
.rf_base_addr = {0xe000, 0xf000},
@@ -3005,6 +3005,8 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
.rsvd_ple_ofst = 0x6f800,
.hfc_param_ini_pcie = rtw8852c_hfc_param_ini_pcie,
.dle_mem_pcie = rtw8852c_dle_mem_pcie,
+ .dle_mem_usb2 = NULL,
+ .dle_mem_usb3 = NULL,
.wde_qempty_acq_grpnum = 16,
.wde_qempty_mgq_grpsel = 16,
.rf_base_addr = {0xe000, 0xf000},
@@ -2817,6 +2817,8 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
.rsvd_ple_ofst = 0x8f800,
.hfc_param_ini_pcie = rtw8922a_hfc_param_ini_pcie,
.dle_mem_pcie = rtw8922a_dle_mem_pcie,
+ .dle_mem_usb2 = NULL,
+ .dle_mem_usb3 = NULL,
.wde_qempty_acq_grpnum = 4,
.wde_qempty_mgq_grpsel = 4,
.rf_base_addr = {0xe000, 0xf000},
Add new members dle_mem_usb2 and dle_mem_usb3 to struct rtw89_chip_info. For now initialise them only for RTL8851B. Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> --- drivers/net/wireless/realtek/rtw89/core.h | 2 ++ drivers/net/wireless/realtek/rtw89/mac.c | 15 ++++++++++ drivers/net/wireless/realtek/rtw89/mac.h | 8 ++++++ drivers/net/wireless/realtek/rtw89/rtw8851b.c | 28 +++++++++++++++++++ drivers/net/wireless/realtek/rtw89/rtw8852a.c | 2 ++ drivers/net/wireless/realtek/rtw89/rtw8852b.c | 2 ++ .../net/wireless/realtek/rtw89/rtw8852bt.c | 2 ++ drivers/net/wireless/realtek/rtw89/rtw8852c.c | 2 ++ drivers/net/wireless/realtek/rtw89/rtw8922a.c | 2 ++ 9 files changed, 63 insertions(+)