Message ID | 20250506-ipq5018-cmn-pll-v2-2-c0a9fcced114@outlook.com |
---|---|
State | New |
Headers | show |
Series | Add CMN PLL clock controller support for IPQ5018 | expand |
On 5/6/25 7:43 AM, George Moussalem via B4 Relay wrote: > From: George Moussalem <george.moussalem@outlook.com> > > The XO and its source clock must be always-on and is enabled in the GCC > during probe. As such, remove the bindings for them. > > Signed-off-by: George Moussalem <george.moussalem@outlook.com> > --- > include/dt-bindings/clock/qcom,gcc-ipq5018.h | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/include/dt-bindings/clock/qcom,gcc-ipq5018.h b/include/dt-bindings/clock/qcom,gcc-ipq5018.h > index f3de2fdfeea11f4b8832b75a05e424ca347b3634..d4de5eaffee7b4cb81e0ff2dcbf9e6669c3da8f8 100644 > --- a/include/dt-bindings/clock/qcom,gcc-ipq5018.h > +++ b/include/dt-bindings/clock/qcom,gcc-ipq5018.h > @@ -140,8 +140,6 @@ > #define GCC_WCSS_DBG_IFC_NTS_BDG_CLK 131 > #define GCC_WCSS_DBG_IFC_NTS_CLK 132 > #define GCC_WCSS_ECAHB_CLK 133 > -#define GCC_XO_CLK 134 > -#define GCC_XO_CLK_SRC 135 > #define GMAC0_RX_CLK_SRC 136 > #define GMAC0_TX_CLK_SRC 137 > #define GMAC1_RX_CLK_SRC 138 Let's skip this patch - when we add dt-bindings, we promise these values will be an ABI, leaving them in there, even if unused, will help introducing spurious entries
diff --git a/include/dt-bindings/clock/qcom,gcc-ipq5018.h b/include/dt-bindings/clock/qcom,gcc-ipq5018.h index f3de2fdfeea11f4b8832b75a05e424ca347b3634..d4de5eaffee7b4cb81e0ff2dcbf9e6669c3da8f8 100644 --- a/include/dt-bindings/clock/qcom,gcc-ipq5018.h +++ b/include/dt-bindings/clock/qcom,gcc-ipq5018.h @@ -140,8 +140,6 @@ #define GCC_WCSS_DBG_IFC_NTS_BDG_CLK 131 #define GCC_WCSS_DBG_IFC_NTS_CLK 132 #define GCC_WCSS_ECAHB_CLK 133 -#define GCC_XO_CLK 134 -#define GCC_XO_CLK_SRC 135 #define GMAC0_RX_CLK_SRC 136 #define GMAC0_TX_CLK_SRC 137 #define GMAC1_RX_CLK_SRC 138