diff mbox series

[v2,4/4] arm64: dts: qcom: x1e80100-qcp: Add qref supply for PCIe PHYs

Message ID 20250425092955.4099677-5-quic_wenbyao@quicinc.com
State New
Headers show
Series arm64: qcom: x1e80100-qcp: Add power supply and sideband signals for PCIe RC | expand

Commit Message

Wenbin Yao April 25, 2025, 9:29 a.m. UTC 
From: Qiang Yu <quic_qianyu@quicinc.com>

All PCIe PHYs on X1E80100 require vdda-qref power supplies, but this is
missing in the current PHY device tree node. The PCIe port can still
function because the regulator L3J, which vdda-qref consumes, is voted by
other components.

Since the device tree should accurately describe the hardware, add the
vdda-qref power supply explicitly in all PCIe PHY device nodes.

Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
Signed-off-by: Wenbin Yao <quic_wenbyao@quicinc.com>
---
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 3 +++
 1 file changed, 3 insertions(+)

Comments

Johan Hovold April 25, 2025, 12:02 p.m. UTC | #1 
On Fri, Apr 25, 2025 at 12:03:06PM +0200, Konrad Dybcio wrote:
> On 4/25/25 11:51 AM, Johan Hovold wrote:
> > On Fri, Apr 25, 2025 at 05:29:55PM +0800, Wenbin Yao wrote:
> >> From: Qiang Yu <quic_qianyu@quicinc.com>
> >>
> >> All PCIe PHYs on X1E80100 require vdda-qref power supplies, but this is
> >> missing in the current PHY device tree node. The PCIe port can still
> >> function because the regulator L3J, which vdda-qref consumes, is voted by
> >> other components.
> >>
> >> Since the device tree should accurately describe the hardware, add the
> >> vdda-qref power supply explicitly in all PCIe PHY device nodes.
> > 
> > AFAIU the PHYs do not use this qref supply directly so it does not
> > belong in the PHY node (but possibly in the tcsr node that provides the
> > refclk).
> > 
> > Since commit 031b46b4729b ("phy: qcom: qmp-pcie: drop bogus x1e80100
> > qref supplies") it also won't have any effect for pcie4 and pcie6.
> 
> QREF is a separate hw block distributing the reference clocks across
> certain on-SoC peripherals
> 
> If its power goes out, I don't think much of the platform would be
> functional anyway, so it's redundant here..
> 
> It doesn't have its own single register region and it's frankly
> one-shot-configured way before Linux starts up, so there should be
> no need of describing it at all.

Then it sounds like the qref supplies should be marked as always-on. Can
they be disabled at all?

Johan
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
index 88dfd2199..10f2ac70e 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
@@ -994,6 +994,7 @@  &pcie3 {
 &pcie3_phy {
 	vdda-phy-supply = <&vreg_l3c_0p8>;
 	vdda-pll-supply = <&vreg_l3e_1p2>;
+	vdda-qref-supply = <&vreg_l3j_0p8>;
 
 	status = "okay";
 };
@@ -1017,6 +1018,7 @@  &pcie4 {
 &pcie4_phy {
 	vdda-phy-supply = <&vreg_l3i_0p8>;
 	vdda-pll-supply = <&vreg_l3e_1p2>;
+	vdda-qref-supply = <&vreg_l3j_0p8>;
 
 	status = "okay";
 };
@@ -1053,6 +1055,7 @@  &pcie6a {
 &pcie6a_phy {
 	vdda-phy-supply = <&vreg_l1d_0p8>;
 	vdda-pll-supply = <&vreg_l2j_1p2>;
+	vdda-qref-supply = <&vreg_l3j_0p8>;
 
 	status = "okay";
 };