| Message ID | 20250425-b4-media-committers-25-04-25-camss-supplies-v2-1-8c12450b2934@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | media: qcom: camss: x1e80100: Add support for individual CSIPHY supplies | expand |
On Fri, Apr 25, 2025 at 04:17:33PM +0100, Bryan O'Donoghue wrote: > Declare a CSIPHY regulator pair 0p8 and 1p2 for each CSIPHY. > > Name the inputs based on the voltage so as to have a consistent naming of > these rails across SoCs and PCBs. > > There are no upstream users of this yaml definition yet so this change is > safe to make. > > Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > --- > .../bindings/media/qcom,x1e80100-camss.yaml | 52 +++++++++++++++++----- > 1 file changed, 40 insertions(+), 12 deletions(-) > > diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml > index 113565cf2a991a8dcbc20889090e177e8bcadaac..dc7c1a9394c3b547f5e0885bf501ed42dfbeba88 100644 > --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml > +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml > @@ -118,14 +118,6 @@ properties: > - const: ife1 > - const: top > > - vdd-csiphy-0p8-supply: > - description: > - Phandle to a 0.8V regulator supply to a PHY. > - > - vdd-csiphy-1p2-supply: > - description: > - Phandle to 1.8V regulator supply to a PHY. > - > ports: > $ref: /schemas/graph.yaml#/properties/ports > > @@ -157,6 +149,30 @@ properties: > - clock-lanes > - data-lanes > > + vdd-csiphy0-0p8-supply: > + description: Phandle to a 0.8V regulator supply to csiphy0. > + > + vdd-csiphy0-1p2-supply: > + description: Phandle to a 1.2V regulator supply to csiphy0. > + > + vdd-csiphy1-0p8-supply: > + description: Phandle to a 0.8V regulator supply to csiphy1. > + > + vdd-csiphy1-1p2-supply: > + description: Phandle to a 1.2V regulator supply to csiphy1. > + > + vdd-csiphy2-0p8-supply: > + description: Phandle to a 0.8V regulator supply to csiphy2. > + > + vdd-csiphy2-1p2-supply: > + description: Phandle to a 1.2V regulator supply to csiphy2. > + > + vdd-csiphy4-0p8-supply: > + description: Phandle to a 0.8V regulator supply to csiphy4. > + > + vdd-csiphy4-1p2-supply: > + description: Phandle to a 1.2V regulator supply to csiphy4. My preference is still for the platform-specific supply names which can be correlated to the actual SoC pins. > + > required: > - compatible > - reg
diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml index 113565cf2a991a8dcbc20889090e177e8bcadaac..dc7c1a9394c3b547f5e0885bf501ed42dfbeba88 100644 --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml @@ -118,14 +118,6 @@ properties: - const: ife1 - const: top - vdd-csiphy-0p8-supply: - description: - Phandle to a 0.8V regulator supply to a PHY. - - vdd-csiphy-1p2-supply: - description: - Phandle to 1.8V regulator supply to a PHY. - ports: $ref: /schemas/graph.yaml#/properties/ports @@ -157,6 +149,30 @@ properties: - clock-lanes - data-lanes + vdd-csiphy0-0p8-supply: + description: Phandle to a 0.8V regulator supply to csiphy0. + + vdd-csiphy0-1p2-supply: + description: Phandle to a 1.2V regulator supply to csiphy0. + + vdd-csiphy1-0p8-supply: + description: Phandle to a 0.8V regulator supply to csiphy1. + + vdd-csiphy1-1p2-supply: + description: Phandle to a 1.2V regulator supply to csiphy1. + + vdd-csiphy2-0p8-supply: + description: Phandle to a 0.8V regulator supply to csiphy2. + + vdd-csiphy2-1p2-supply: + description: Phandle to a 1.2V regulator supply to csiphy2. + + vdd-csiphy4-0p8-supply: + description: Phandle to a 0.8V regulator supply to csiphy4. + + vdd-csiphy4-1p2-supply: + description: Phandle to a 1.2V regulator supply to csiphy4. + required: - compatible - reg @@ -170,10 +186,22 @@ required: - iommus - power-domains - power-domain-names - - vdd-csiphy-0p8-supply - - vdd-csiphy-1p2-supply - ports +anyOf: + - required: + - vdd-csiphy0-0p8-supply + - vdd-csiphy0-1p2-supply + - required: + - vdd-csiphy1-0p8-supply + - vdd-csiphy1-1p2-supply + - required: + - vdd-csiphy2-0p8-supply + - vdd-csiphy2-1p2-supply + - required: + - vdd-csiphy4-0p8-supply + - vdd-csiphy4-1p2-supply + additionalProperties: false examples: @@ -347,8 +375,8 @@ examples: "ife1", "top"; - vdd-csiphy-0p8-supply = <&csiphy_0p8_supply>; - vdd-csiphy-1p2-supply = <&csiphy_1p2_supply>; + vdd-csiphy0-0p8-supply = <&csiphy_0p8_supply>; + vdd-csiphy0-1p2-supply = <&csiphy_1p2_supply>; ports { #address-cells = <1>;
Declare a CSIPHY regulator pair 0p8 and 1p2 for each CSIPHY. Name the inputs based on the voltage so as to have a consistent naming of these rails across SoCs and PCBs. There are no upstream users of this yaml definition yet so this change is safe to make. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- .../bindings/media/qcom,x1e80100-camss.yaml | 52 +++++++++++++++++----- 1 file changed, 40 insertions(+), 12 deletions(-)