| Message ID | 20250418-vdev_next-20250411_pm_disable-v3-1-0175b691de61@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v3] bus: mhi: host: pci: Disable runtime PM for QDU100 | expand |
On Fri, Apr 18, 2025 at 07:18:18PM +0530, Vivek Pernamitta wrote: > The QDU100 device does not support the MHI M3 state, necessitating the > disabling of runtime PM for this device. It is essential to disable > runtime PM if the device does not support Low Power Mode (LPM). LPM is not very clear here. Please just use M3. > > Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com> > Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- > Changes in v3: > - updated variable to no_m3 from pm_disable > - Link to v2: https://lore.kernel.org/r/20250418-vdev_next-20250411_pm_disable-v2-1-27dd8d433f3b@quicinc.com > > Changes in v2: > - Updated device from getting runtime suspended by avoid skipping autosuspend. > - Updated commit message. > - Link to v1: https://lore.kernel.org/r/20250414-vdev_next-20250411_pm_disable-v1-1-e963677636ca@quicinc.com > --- > drivers/bus/mhi/host/pci_generic.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c > index 03aa887952098661a488650053a357f883d1559b..df80f3f62278d2cf96066c04926ce1ce58700d1b 100644 > --- a/drivers/bus/mhi/host/pci_generic.c > +++ b/drivers/bus/mhi/host/pci_generic.c > @@ -43,6 +43,7 @@ > * @mru_default: default MRU size for MBIM network packets > * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead > * of inband wake support (such as sdx24) > + * @no_m3: M3 is disabled (optional) Remove 'optional'. It is an opt-in value. > */ > struct mhi_pci_dev_info { > const struct mhi_controller_config *config; > @@ -54,6 +55,7 @@ struct mhi_pci_dev_info { > unsigned int dma_data_width; > unsigned int mru_default; > bool sideband_wake; > + bool no_m3; > }; > > #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \ > @@ -295,6 +297,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_info = { > .bar_num = MHI_PCI_DEFAULT_BAR_NUM, > .dma_data_width = 32, > .sideband_wake = false, > + .no_m3 = true, > }; > > static const struct mhi_channel_config mhi_qcom_sa8775p_channels[] = { > @@ -1270,8 +1273,11 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) > /* start health check */ > mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); > > - /* Only allow runtime-suspend if PME capable (for wakeup) */ > - if (pci_pme_capable(pdev, PCI_D3hot)) { > + /** > + * Disable Runtime PM if device doesn't support MHI M3 state > + * and Allow runtime-suspend if PME capable (for wakeup) "Only allow runtime suspend if both PME from D3Hot and M3 are supported" - Mani
On 4/25/2025 12:38 PM, Manivannan Sadhasivam wrote: > On Fri, Apr 18, 2025 at 07:18:18PM +0530, Vivek Pernamitta wrote: >> The QDU100 device does not support the MHI M3 state, necessitating the >> disabling of runtime PM for this device. It is essential to disable >> runtime PM if the device does not support Low Power Mode (LPM). > > LPM is not very clear here. Please just use M3. > >> >> Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com> >> Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> >> --- >> Changes in v3: >> - updated variable to no_m3 from pm_disable >> - Link to v2: https://lore.kernel.org/r/20250418-vdev_next-20250411_pm_disable-v2-1-27dd8d433f3b@quicinc.com >> >> Changes in v2: >> - Updated device from getting runtime suspended by avoid skipping autosuspend. >> - Updated commit message. >> - Link to v1: https://lore.kernel.org/r/20250414-vdev_next-20250411_pm_disable-v1-1-e963677636ca@quicinc.com >> --- >> drivers/bus/mhi/host/pci_generic.c | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c >> index 03aa887952098661a488650053a357f883d1559b..df80f3f62278d2cf96066c04926ce1ce58700d1b 100644 >> --- a/drivers/bus/mhi/host/pci_generic.c >> +++ b/drivers/bus/mhi/host/pci_generic.c >> @@ -43,6 +43,7 @@ >> * @mru_default: default MRU size for MBIM network packets >> * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead >> * of inband wake support (such as sdx24) >> + * @no_m3: M3 is disabled (optional) > > Remove 'optional'. It is an opt-in value. > >> */ >> struct mhi_pci_dev_info { >> const struct mhi_controller_config *config; >> @@ -54,6 +55,7 @@ struct mhi_pci_dev_info { >> unsigned int dma_data_width; >> unsigned int mru_default; >> bool sideband_wake; >> + bool no_m3; >> }; >> >> #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \ >> @@ -295,6 +297,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_info = { >> .bar_num = MHI_PCI_DEFAULT_BAR_NUM, >> .dma_data_width = 32, >> .sideband_wake = false, >> + .no_m3 = true, >> }; >> >> static const struct mhi_channel_config mhi_qcom_sa8775p_channels[] = { >> @@ -1270,8 +1273,11 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) >> /* start health check */ >> mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); >> >> - /* Only allow runtime-suspend if PME capable (for wakeup) */ >> - if (pci_pme_capable(pdev, PCI_D3hot)) { >> + /** >> + * Disable Runtime PM if device doesn't support MHI M3 state >> + * and Allow runtime-suspend if PME capable (for wakeup) > > "Only allow runtime suspend if both PME from D3Hot and M3 are supported" > > - Mani > Sure, updated accordingly in V4.
diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c index 03aa887952098661a488650053a357f883d1559b..df80f3f62278d2cf96066c04926ce1ce58700d1b 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -43,6 +43,7 @@ * @mru_default: default MRU size for MBIM network packets * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead * of inband wake support (such as sdx24) + * @no_m3: M3 is disabled (optional) */ struct mhi_pci_dev_info { const struct mhi_controller_config *config; @@ -54,6 +55,7 @@ struct mhi_pci_dev_info { unsigned int dma_data_width; unsigned int mru_default; bool sideband_wake; + bool no_m3; }; #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \ @@ -295,6 +297,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_info = { .bar_num = MHI_PCI_DEFAULT_BAR_NUM, .dma_data_width = 32, .sideband_wake = false, + .no_m3 = true, }; static const struct mhi_channel_config mhi_qcom_sa8775p_channels[] = { @@ -1270,8 +1273,11 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) /* start health check */ mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); - /* Only allow runtime-suspend if PME capable (for wakeup) */ - if (pci_pme_capable(pdev, PCI_D3hot)) { + /** + * Disable Runtime PM if device doesn't support MHI M3 state + * and Allow runtime-suspend if PME capable (for wakeup) + */ + if (pci_pme_capable(pdev, PCI_D3hot) && !(info->no_m3)) { pm_runtime_set_autosuspend_delay(&pdev->dev, 2000); pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_mark_last_busy(&pdev->dev);