| Message ID | 20250415072756.20046-4-quic_kaushalk@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Enable QPIC BAM and QPIC NAND support for SDX75 | expand |
On 4/15/2025 3:20 PM, Konrad Dybcio wrote: > On 4/15/25 9:27 AM, Kaushal Kumar wrote: >> Add devicetree node to enable support for QPIC BAM DMA controller on >> Qualcomm SDX75 platform. >> >> Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sdx75.dtsi | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi >> index b0a8a0fe5f39..e3a0ee661c4a 100644 >> --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi >> @@ -880,6 +880,20 @@ >> qcom,bcm-voters = <&apps_bcm_voter>; >> }; >> >> + qpic_bam: dma-controller@1c9c000 { >> + compatible = "qcom,bam-v1.7.0"; > v1.7.4, looks good otherwise Ack. v1.7.4 is backward compatible with v1.7.0 supported by the driver. I will update this in next patch version. > Konrad - Kaushal
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi index b0a8a0fe5f39..e3a0ee661c4a 100644 --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi @@ -880,6 +880,20 @@ qcom,bcm-voters = <&apps_bcm_voter>; }; + qpic_bam: dma-controller@1c9c000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x0 0x01c9c000 0x0 0x1c000>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rpmhcc RPMH_QPIC_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x100 0x3>; + dma-coherent; + status = "disabled"; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>;
Add devicetree node to enable support for QPIC BAM DMA controller on Qualcomm SDX75 platform. Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> --- arch/arm64/boot/dts/qcom/sdx75.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)