[PULL,04/23] hw/arm/fsl-imx8mp: Remove unused define

Message ID	20250331194822.77309-5-philmd@linaro.org
State	Accepted
Commit	f32d678252134779d1f129d80435e827877136f5
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Series	[PULL,01/23] hw/arm/armv7m: Expose and access System Control Space as little endian \| expand [PULL,01/23] hw/arm/armv7m: Expose and access System Control Space as little endian [PULL,02/23] hw/arm/imx8mp-evk: Fix reference count of SoC object [PULL,03/23] hw/arm/fsl-imx8mp: Derive struct FslImx8mpState from TYPE_SYS_BUS_DEVICE [PULL,04/23] hw/arm/fsl-imx8mp: Remove unused define [PULL,05/23] hw/core/cpu: Use size_t for memory_rw_debug len argument [PULL,06/23] hw/block/m25p80: Categorize and add description [PULL,07/23] hw/display/dm163: Add description [PULL,08/23] hw/dma/i82374: Categorize and add description [PULL,09/23] hw/mips: Mark the "mipssim" machine as deprecated [PULL,10/23] hw/rtc/goldfish: keep time offset when resetting [PULL,11/23] hw/misc/pll: Do not expose as user-creatable [PULL,12/23] hw/nvram/xlnx-efuse: Do not expose as user-creatable [PULL,13/23] hw/scsi/lsi53c895a: fix memory leak in lsi_scsi_realize() [PULL,14/23] hw/sd/sdhci: free irq on exit [PULL,15/23] hw/char/bcm2835_aux: Fix incorrect interrupt ID when RX disabled [PULL,16/23] hw/ufs: free irq on exit [PULL,17/23] hw/pci-host/designware: Fix ATU_UPPER_TARGET register access [PULL,18/23] target/hppa: Remove duplicated CPU_RESOLVING_TYPE definition [PULL,19/23] target/avr: Fix buffer read in avr_print_insn [PULL,20/23] target/sparc: Log unimplemented ASI load/store accesses [PULL,21/23] target/mips: Revert TARGET_PAGE_BITS_VARY [PULL,22/23] target/mips: Require even maskbits in update_pagemask [PULL,23/23] target/mips: Simplify and fix update_pagemask

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20250331194822.77309-5-philmd@linaro.org

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f32d678252134779d1f129d80435e827877136f5

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Subject: [PULL 04/23] hw/arm/fsl-imx8mp: Remove unused define
Date: Mon, 31 Mar 2025 21:48:02 +0200
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Series

[PULL,01/23] hw/arm/armv7m: Expose and access System Control Space as little endian | expand

Commit Message

Philippe Mathieu-Daudé March 31, 2025, 7:48 p.m. UTC

From: Bernhard Beschow <shentey@gmail.com>

The SoC has three SPI controllers, not four.
Remove the extra define of an SPI IRQ.

Fixes: 06908a84f036 "hw/arm/fsl-imx8mp: Add SPI controllers"
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20250318205709.28862-4-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/arm/fsl-imx8mp.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h
index 22fdc0d67c2..d016f7d3371 100644
--- a/include/hw/arm/fsl-imx8mp.h
+++ b/include/hw/arm/fsl-imx8mp.h
@@ -238,7 +238,6 @@  enum FslImx8mpIrqs {
     FSL_IMX8MP_ECSPI1_IRQ   = 31,
     FSL_IMX8MP_ECSPI2_IRQ   = 32,
     FSL_IMX8MP_ECSPI3_IRQ   = 33,
-    FSL_IMX8MP_ECSPI4_IRQ   = 34,
 
     FSL_IMX8MP_I2C1_IRQ     = 35,
     FSL_IMX8MP_I2C2_IRQ     = 36,

[PULL,04/23] hw/arm/fsl-imx8mp: Remove unused define

Commit Message

Patch