diff mbox series

[PATCH-for-10.1,1/4] target/sparc: Expose more CPU features

Message ID 20250325123927.74939-2-philmd@linaro.org
State New
Headers show
Series target/sparc: Spring cleanups around CPU features & LEON3 | expand

Commit Message

Philippe Mathieu-Daudé March 25, 2025, 12:39 p.m. UTC
Various features were not displayed or settable from command line.

Diff of 'qemu-system-sparc -cpu help':

 ...
   TI-SuperSparc-60     (IU 40000000 FPU 00000000 MMU 01000800 NWINS 8)
   TI-SuperSparc-61     (IU 44000000 FPU 00000000 MMU 01000000 NWINS 8)
   TI-SuperSparc-II     (IU 40000000 FPU 00000000 MMU 08000000 NWINS 8)
 - LEON2                (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8)
 - LEON3                (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8)
 + LEON2                (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8) +shutdown
 + LEON3                (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8) +shutdown +asr17 +cachectrl +powerdown +casa
  Default CPU feature flags (use '-' to remove): mul div fsmuld
 -Available CPU feature flags (use '+' to add): float128
 +Available CPU feature flags (use '+' to add): shutdown asr17 cachectrl powerdown casa float128
  Numerical features (use '=' to set): iu_version fpu_version mmu_version nwindows

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/sparc/cpu.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Richard Henderson March 25, 2025, 2:11 p.m. UTC | #1
On 3/25/25 05:39, Philippe Mathieu-Daudé wrote:
> Various features were not displayed or settable from command line.
> 
> Diff of 'qemu-system-sparc -cpu help':
> 
>   ...
>     TI-SuperSparc-60     (IU 40000000 FPU 00000000 MMU 01000800 NWINS 8)
>     TI-SuperSparc-61     (IU 44000000 FPU 00000000 MMU 01000000 NWINS 8)
>     TI-SuperSparc-II     (IU 40000000 FPU 00000000 MMU 08000000 NWINS 8)
>   - LEON2                (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8)
>   - LEON3                (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8)
>   + LEON2                (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8) +shutdown
>   + LEON3                (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8) +shutdown +asr17 +cachectrl +powerdown +casa
>    Default CPU feature flags (use '-' to remove): mul div fsmuld
>   -Available CPU feature flags (use '+' to add): float128
>   +Available CPU feature flags (use '+' to add): shutdown asr17 cachectrl powerdown casa float128
>    Numerical features (use '=' to set): iu_version fpu_version mmu_version nwindows
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/sparc/cpu.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
> index 57161201173..37406227cb7 100644
> --- a/target/sparc/cpu.c
> +++ b/target/sparc/cpu.c
> @@ -548,6 +548,11 @@ static const sparc_def_t sparc_defs[] = {
>   /* This must match sparc_cpu_properties[]. */
>   static const char * const feature_name[] = {
>       [CPU_FEATURE_BIT_FLOAT128] = "float128",
> +    [CPU_FEATURE_BIT_TA0_SHUTDOWN] = "shutdown",
> +    [CPU_FEATURE_BIT_POWERDOWN] = "powerdown",
> +    [CPU_FEATURE_BIT_CACHE_CTRL] = "cachectrl",
> +    [CPU_FEATURE_BIT_ASR17] = "asr17",
> +    [CPU_FEATURE_BIT_CASA] = "casa",
>   #ifdef TARGET_SPARC64
>       [CPU_FEATURE_BIT_CMT] = "cmt",
>       [CPU_FEATURE_BIT_GL] = "gl",

I'm not convinced this is a good idea.

The only effect of disabling these is to break LEON kernels. These features are not 
exposed for kernel discovery, so you can't just turn them on and have them used on 
supersparc either.  They will certainly break anything sparc64.


r~
Philippe Mathieu-Daudé March 25, 2025, 2:43 p.m. UTC | #2
On 25/3/25 15:11, Richard Henderson wrote:
> On 3/25/25 05:39, Philippe Mathieu-Daudé wrote:
>> Various features were not displayed or settable from command line.
>>
>> Diff of 'qemu-system-sparc -cpu help':
>>
>>   ...
>>     TI-SuperSparc-60     (IU 40000000 FPU 00000000 MMU 01000800 NWINS 8)
>>     TI-SuperSparc-61     (IU 44000000 FPU 00000000 MMU 01000000 NWINS 8)
>>     TI-SuperSparc-II     (IU 40000000 FPU 00000000 MMU 08000000 NWINS 8)
>>   - LEON2                (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8)
>>   - LEON3                (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8)
>>   + LEON2                (IU f2000000 FPU 00080000 MMU f2000000 NWINS 
>> 8) +shutdown
>>   + LEON3                (IU f3000000 FPU 00080000 MMU f3000000 NWINS 
>> 8) +shutdown +asr17 +cachectrl +powerdown +casa
>>    Default CPU feature flags (use '-' to remove): mul div fsmuld
>>   -Available CPU feature flags (use '+' to add): float128
>>   +Available CPU feature flags (use '+' to add): shutdown asr17 
>> cachectrl powerdown casa float128
>>    Numerical features (use '=' to set): iu_version fpu_version 
>> mmu_version nwindows
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>>   target/sparc/cpu.c | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
>> index 57161201173..37406227cb7 100644
>> --- a/target/sparc/cpu.c
>> +++ b/target/sparc/cpu.c
>> @@ -548,6 +548,11 @@ static const sparc_def_t sparc_defs[] = {
>>   /* This must match sparc_cpu_properties[]. */
>>   static const char * const feature_name[] = {
>>       [CPU_FEATURE_BIT_FLOAT128] = "float128",
>> +    [CPU_FEATURE_BIT_TA0_SHUTDOWN] = "shutdown",
>> +    [CPU_FEATURE_BIT_POWERDOWN] = "powerdown",
>> +    [CPU_FEATURE_BIT_CACHE_CTRL] = "cachectrl",
>> +    [CPU_FEATURE_BIT_ASR17] = "asr17",
>> +    [CPU_FEATURE_BIT_CASA] = "casa",
>>   #ifdef TARGET_SPARC64
>>       [CPU_FEATURE_BIT_CMT] = "cmt",
>>       [CPU_FEATURE_BIT_GL] = "gl",
> 
> I'm not convinced this is a good idea.
> 
> The only effect of disabling these is to break LEON kernels. These 
> features are not exposed for kernel discovery, so you can't just turn 
> them on and have them used on supersparc either.  They will certainly 
> break anything sparc64.

OK. It seems there is a lot of hidden knowledge behind this features
array :)
diff mbox series

Patch

diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 57161201173..37406227cb7 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -548,6 +548,11 @@  static const sparc_def_t sparc_defs[] = {
 /* This must match sparc_cpu_properties[]. */
 static const char * const feature_name[] = {
     [CPU_FEATURE_BIT_FLOAT128] = "float128",
+    [CPU_FEATURE_BIT_TA0_SHUTDOWN] = "shutdown",
+    [CPU_FEATURE_BIT_POWERDOWN] = "powerdown",
+    [CPU_FEATURE_BIT_CACHE_CTRL] = "cachectrl",
+    [CPU_FEATURE_BIT_ASR17] = "asr17",
+    [CPU_FEATURE_BIT_CASA] = "casa",
 #ifdef TARGET_SPARC64
     [CPU_FEATURE_BIT_CMT] = "cmt",
     [CPU_FEATURE_BIT_GL] = "gl",