| Message ID | 20250323173730.3213964-9-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/avr: Increase page size | expand |
On 3/23/25 10:37, Richard Henderson wrote: > Communicate the offset of io within the first page between the > board, the cpu, and the translator. So far this is always 0. > This will be used to optimize memory layout. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/avr/cpu.h | 2 ++ > hw/avr/atmega.c | 2 ++ > target/avr/cpu.c | 1 + > target/avr/translate.c | 2 ++ > 4 files changed, 7 insertions(+) > > diff --git a/target/avr/cpu.h b/target/avr/cpu.h > index be27b0152b..0f5e1a53bc 100644 > --- a/target/avr/cpu.h > +++ b/target/avr/cpu.h > @@ -148,6 +148,8 @@ struct ArchCPU { > > /* Initial value of stack pointer */ > uint32_t init_sp; > + /* Offset of the beginning of I/O within the first page. */ > + uint32_t offset_io; > }; > > /** > diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c > index f6844bf118..273582b8af 100644 > --- a/hw/avr/atmega.c > +++ b/hw/avr/atmega.c > @@ -236,6 +236,8 @@ static void atmega_realize(DeviceState *dev, Error **errp) > > object_property_set_uint(OBJECT(&s->cpu), "init-sp", > mc->io_size + mc->sram_size - 1, &error_abort); > + object_property_set_uint(OBJECT(&s->cpu), "offset-io", > + 0, &error_abort); > > qdev_realize(DEVICE(&s->cpu), NULL, &error_abort); > cpudev = DEVICE(&s->cpu); > diff --git a/target/avr/cpu.c b/target/avr/cpu.c > index 0b14b36c17..080f6f30d3 100644 > --- a/target/avr/cpu.c > +++ b/target/avr/cpu.c > @@ -169,6 +169,7 @@ static void avr_cpu_initfn(Object *obj) > > static const Property avr_cpu_properties[] = { > DEFINE_PROP_UINT32("init-sp", AVRCPU, init_sp, 0), > + DEFINE_PROP_UINT32("offset-io", AVRCPU, offset_io, 0), > }; > > static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) > diff --git a/target/avr/translate.c b/target/avr/translate.c > index 0490936cd5..e9fef1aaad 100644 > --- a/target/avr/translate.c > +++ b/target/avr/translate.c > @@ -92,6 +92,7 @@ struct DisasContext { > > /* Routine used to access memory */ > int memidx; > + uint32_t offset_io; > > /* > * some AVR instructions can make the following instruction to be skipped > @@ -2664,6 +2665,7 @@ static void avr_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) > ctx->cs = cs; > ctx->env = cpu_env(cs); > ctx->npc = ctx->base.pc_first / 2; > + ctx->offset_io = env_archcpu(ctx->env)->offset_io; > > ctx->skip_cond = TCG_COND_NEVER; > if (tb_flags & TB_FLAGS_SKIP) { Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff --git a/target/avr/cpu.h b/target/avr/cpu.h index be27b0152b..0f5e1a53bc 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -148,6 +148,8 @@ struct ArchCPU { /* Initial value of stack pointer */ uint32_t init_sp; + /* Offset of the beginning of I/O within the first page. */ + uint32_t offset_io; }; /** diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index f6844bf118..273582b8af 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -236,6 +236,8 @@ static void atmega_realize(DeviceState *dev, Error **errp) object_property_set_uint(OBJECT(&s->cpu), "init-sp", mc->io_size + mc->sram_size - 1, &error_abort); + object_property_set_uint(OBJECT(&s->cpu), "offset-io", + 0, &error_abort); qdev_realize(DEVICE(&s->cpu), NULL, &error_abort); cpudev = DEVICE(&s->cpu); diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 0b14b36c17..080f6f30d3 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -169,6 +169,7 @@ static void avr_cpu_initfn(Object *obj) static const Property avr_cpu_properties[] = { DEFINE_PROP_UINT32("init-sp", AVRCPU, init_sp, 0), + DEFINE_PROP_UINT32("offset-io", AVRCPU, offset_io, 0), }; static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) diff --git a/target/avr/translate.c b/target/avr/translate.c index 0490936cd5..e9fef1aaad 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -92,6 +92,7 @@ struct DisasContext { /* Routine used to access memory */ int memidx; + uint32_t offset_io; /* * some AVR instructions can make the following instruction to be skipped @@ -2664,6 +2665,7 @@ static void avr_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->cs = cs; ctx->env = cpu_env(cs); ctx->npc = ctx->base.pc_first / 2; + ctx->offset_io = env_archcpu(ctx->env)->offset_io; ctx->skip_cond = TCG_COND_NEVER; if (tb_flags & TB_FLAGS_SKIP) {
Communicate the offset of io within the first page between the board, the cpu, and the translator. So far this is always 0. This will be used to optimize memory layout. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/avr/cpu.h | 2 ++ hw/avr/atmega.c | 2 ++ target/avr/cpu.c | 1 + target/avr/translate.c | 2 ++ 4 files changed, 7 insertions(+)