| Message ID | 20250311-dtbinding-v1-3-5c807d33f7ae@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | media: qcom: iris: add support for SA8775P | expand |
On 3/11/25 1:03 PM, Vikash Garodia wrote: > Video node enables video on Qualcomm SA8775P platform. > > Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ > 1 file changed, 67 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -10,6 +10,7 @@ > #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> > #include <dt-bindings/clock/qcom,sa8775p-gcc.h> > #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> > +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> > #include <dt-bindings/dma/qcom-gpi.h> > #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> > #include <dt-bindings/mailbox/qcom-ipcc.h> > @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { > interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; > }; > > + iris: video-codec@aa00000 { > + compatible = "qcom,sa8775p-iris"; > + > + reg = <0 0x0aa00000 0 0xf0000>; > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > + > + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, > + <&videocc VIDEO_CC_MVS0_GDSC>, > + <&rpmhpd SA8775P_MXC>, > + <&rpmhpd SA8775P_MMCX>; > + power-domain-names = "venus", > + "vcodec0", > + "mx", > + "mmcx"; > + operating-points-v2 = <&iris_opp_table>; > + > + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, > + <&videocc VIDEO_CC_MVS0C_CLK>, > + <&videocc VIDEO_CC_MVS0_CLK>; > + clock-names = "iface", > + "core", > + "vcodec0_core"; > + > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS > + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, This path should use QCOM_ICC_TAG_ACTIVE_ONLY on both endpoints > + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "cpu-cfg", > + "video-mem"; > + > + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; If it needs different firmware, I have my doubts over why 8550's data would be fully reused. Are you sure everything in iris_platform_sm8550.c applies? > + memory-region = <&pil_video_mem>; > + > + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; > + reset-names = "bus"; > + > + iommus = <&apps_smmu 0x0880 0x0400>, > + <&apps_smmu 0x0887 0x0400>; > + dma-coherent; > + > + iris_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-366000000 { > + opp-hz = /bits/ 64 <366000000>; > + required-opps = <&rpmhpd_opp_svs_l1>, > + <&rpmhpd_opp_svs_l1>; > + }; Please add a newline between subsequent subnodes Konrad
On 3/15/25 2:43 PM, Konrad Dybcio wrote: > On 3/11/25 1:03 PM, Vikash Garodia wrote: >> Video node enables video on Qualcomm SA8775P platform. >> >> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ >> 1 file changed, 67 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 >> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> @@ -10,6 +10,7 @@ >> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> >> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> >> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> >> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> >> #include <dt-bindings/dma/qcom-gpi.h> >> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> >> #include <dt-bindings/mailbox/qcom-ipcc.h> >> @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { >> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >> }; >> >> + iris: video-codec@aa00000 { >> + compatible = "qcom,sa8775p-iris"; >> + >> + reg = <0 0x0aa00000 0 0xf0000>; >> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; >> + >> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, >> + <&videocc VIDEO_CC_MVS0_GDSC>, >> + <&rpmhpd SA8775P_MXC>, >> + <&rpmhpd SA8775P_MMCX>; >> + power-domain-names = "venus", >> + "vcodec0", >> + "mx", >> + "mmcx"; >> + operating-points-v2 = <&iris_opp_table>; >> + >> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, >> + <&videocc VIDEO_CC_MVS0C_CLK>, >> + <&videocc VIDEO_CC_MVS0_CLK>; >> + clock-names = "iface", >> + "core", >> + "vcodec0_core"; >> + >> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, > > This path should use QCOM_ICC_TAG_ACTIVE_ONLY on both endpoints Please also align the &s Konrad
On Sat, Mar 15, 2025 at 02:43:30PM +0100, Konrad Dybcio wrote: > On 3/11/25 1:03 PM, Vikash Garodia wrote: > > Video node enables video on Qualcomm SA8775P platform. > > > > Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> > > --- > > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ > > 1 file changed, 67 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > > index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 > > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > > @@ -10,6 +10,7 @@ > > #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> > > #include <dt-bindings/clock/qcom,sa8775p-gcc.h> > > #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> > > +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> > > #include <dt-bindings/dma/qcom-gpi.h> > > #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> > > #include <dt-bindings/mailbox/qcom-ipcc.h> > > @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { > > interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; > > }; > > > > + iris: video-codec@aa00000 { > > + compatible = "qcom,sa8775p-iris"; > > + > > + reg = <0 0x0aa00000 0 0xf0000>; > > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > > + > > + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, > > + <&videocc VIDEO_CC_MVS0_GDSC>, > > + <&rpmhpd SA8775P_MXC>, > > + <&rpmhpd SA8775P_MMCX>; > > + power-domain-names = "venus", > > + "vcodec0", > > + "mx", > > + "mmcx"; > > + operating-points-v2 = <&iris_opp_table>; > > + > > + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, > > + <&videocc VIDEO_CC_MVS0C_CLK>, > > + <&videocc VIDEO_CC_MVS0_CLK>; > > + clock-names = "iface", > > + "core", > > + "vcodec0_core"; > > + > > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS > > + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, > > This path should use QCOM_ICC_TAG_ACTIVE_ONLY on both endpoints > > > + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS > > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > > + interconnect-names = "cpu-cfg", > > + "video-mem"; > > + > > + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; Firmware-name should be a part of the board DT file rather than the SoC DT. > > If it needs different firmware, I have my doubts over why 8550's data > would be fully reused. Are you sure everything in iris_platform_sm8550.c > applies? If I understand correctly, the firmware is different, because the signature profile is different. The Iris core should be compatible. > > > + memory-region = <&pil_video_mem>; > > + > > + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; > > + reset-names = "bus"; > > + > > + iommus = <&apps_smmu 0x0880 0x0400>, > > + <&apps_smmu 0x0887 0x0400>; > > + dma-coherent; > > + > > + iris_opp_table: opp-table { > > + compatible = "operating-points-v2"; > > + > > + opp-366000000 { > > + opp-hz = /bits/ 64 <366000000>; > > + required-opps = <&rpmhpd_opp_svs_l1>, > > + <&rpmhpd_opp_svs_l1>; > > + }; > > Please add a newline between subsequent subnodes > > Konrad
On 3/16/2025 12:02 AM, Dmitry Baryshkov wrote: > On Sat, Mar 15, 2025 at 02:43:30PM +0100, Konrad Dybcio wrote: >> On 3/11/25 1:03 PM, Vikash Garodia wrote: >>> Video node enables video on Qualcomm SA8775P platform. >>> >>> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ >>> 1 file changed, 67 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 >>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> @@ -10,6 +10,7 @@ >>> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> >>> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> >>> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> >>> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> >>> #include <dt-bindings/dma/qcom-gpi.h> >>> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> >>> #include <dt-bindings/mailbox/qcom-ipcc.h> >>> @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { >>> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >>> }; >>> >>> + iris: video-codec@aa00000 { >>> + compatible = "qcom,sa8775p-iris"; >>> + >>> + reg = <0 0x0aa00000 0 0xf0000>; >>> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; >>> + >>> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, >>> + <&videocc VIDEO_CC_MVS0_GDSC>, >>> + <&rpmhpd SA8775P_MXC>, >>> + <&rpmhpd SA8775P_MMCX>; >>> + power-domain-names = "venus", >>> + "vcodec0", >>> + "mx", >>> + "mmcx"; >>> + operating-points-v2 = <&iris_opp_table>; >>> + >>> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, >>> + <&videocc VIDEO_CC_MVS0C_CLK>, >>> + <&videocc VIDEO_CC_MVS0_CLK>; >>> + clock-names = "iface", >>> + "core", >>> + "vcodec0_core"; >>> + >>> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >>> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, >> >> This path should use QCOM_ICC_TAG_ACTIVE_ONLY on both endpoints >> >>> + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS >>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; >>> + interconnect-names = "cpu-cfg", >>> + "video-mem"; >>> + >>> + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; > > Firmware-name should be a part of the board DT file rather than the SoC > DT. Given that video ip is independent of any board, remains same for any board variant of SA8775p, and again for the same reason, PIL, aspects of video driver was made out of probe, i would prefer to keep it in SOC. Again, this can be overridden in board specific variant DT, if any case arise, incase. >> >> If it needs different firmware, I have my doubts over why 8550's data >> would be fully reused. Are you sure everything in iris_platform_sm8550.c >> applies? > > If I understand correctly, the firmware is different, because the > signature profile is different. The Iris core should be compatible. That appropriately explains the need for different firmware. > >> >>> + memory-region = <&pil_video_mem>; >>> + >>> + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; >>> + reset-names = "bus"; >>> + >>> + iommus = <&apps_smmu 0x0880 0x0400>, >>> + <&apps_smmu 0x0887 0x0400>; >>> + dma-coherent; >>> + >>> + iris_opp_table: opp-table { >>> + compatible = "operating-points-v2"; >>> + >>> + opp-366000000 { >>> + opp-hz = /bits/ 64 <366000000>; >>> + required-opps = <&rpmhpd_opp_svs_l1>, >>> + <&rpmhpd_opp_svs_l1>; >>> + }; >> >> Please add a newline between subsequent subnodes >> >> Konrad Regards, Vikash
On Mon, Mar 17, 2025 at 11:30:16AM +0530, Vikash Garodia wrote: > > On 3/16/2025 12:02 AM, Dmitry Baryshkov wrote: > > On Sat, Mar 15, 2025 at 02:43:30PM +0100, Konrad Dybcio wrote: > >> On 3/11/25 1:03 PM, Vikash Garodia wrote: > >>> Video node enables video on Qualcomm SA8775P platform. > >>> > >>> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> > >>> --- > >>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ > >>> 1 file changed, 67 insertions(+) > >>> > >> > >>> + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS > >>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > >>> + interconnect-names = "cpu-cfg", > >>> + "video-mem"; > >>> + > >>> + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; > > > > Firmware-name should be a part of the board DT file rather than the SoC > > DT. > Given that video ip is independent of any board, remains same for any board > variant of SA8775p, and again for the same reason, PIL, aspects of video driver > was made out of probe, i would prefer to keep it in SOC. Again, this can be > overridden in board specific variant DT, if any case arise, incase. This file is also board-specific and will not be accepted by a board fused to work with a particular set of CA keys. So, no. This needs to go to the board DT file.
On Tue, Mar 11, 2025 at 05:33:55PM +0530, Vikash Garodia wrote: > Video node enables video on Qualcomm SA8775P platform. > > Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ > 1 file changed, 67 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -10,6 +10,7 @@ > #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> > #include <dt-bindings/clock/qcom,sa8775p-gcc.h> > #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> > +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> > #include <dt-bindings/dma/qcom-gpi.h> > #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> > #include <dt-bindings/mailbox/qcom-ipcc.h> > @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { > interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; > }; > > + iris: video-codec@aa00000 { > + compatible = "qcom,sa8775p-iris"; > + > + reg = <0 0x0aa00000 0 0xf0000>; > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > + > + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, > + <&videocc VIDEO_CC_MVS0_GDSC>, > + <&rpmhpd SA8775P_MXC>, > + <&rpmhpd SA8775P_MMCX>; > + power-domain-names = "venus", > + "vcodec0", > + "mx", > + "mmcx"; > + operating-points-v2 = <&iris_opp_table>; > + > + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, > + <&videocc VIDEO_CC_MVS0C_CLK>, > + <&videocc VIDEO_CC_MVS0_CLK>; > + clock-names = "iface", > + "core", > + "vcodec0_core"; > + > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS > + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, > + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "cpu-cfg", > + "video-mem"; > + > + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; > + memory-region = <&pil_video_mem>; > + > + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; > + reset-names = "bus"; > + > + iommus = <&apps_smmu 0x0880 0x0400>, > + <&apps_smmu 0x0887 0x0400>; > + dma-coherent; I think almost missed it: status = "disabled"; Don't enable the device by default, there is a chance of the firmware being not present.
On 3/17/25 12:31 PM, Dmitry Baryshkov wrote: > On Tue, Mar 11, 2025 at 05:33:55PM +0530, Vikash Garodia wrote: >> Video node enables video on Qualcomm SA8775P platform. >> >> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ >> 1 file changed, 67 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 >> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> @@ -10,6 +10,7 @@ >> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> >> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> >> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> >> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> >> #include <dt-bindings/dma/qcom-gpi.h> >> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> >> #include <dt-bindings/mailbox/qcom-ipcc.h> >> @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { >> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >> }; >> >> + iris: video-codec@aa00000 { >> + compatible = "qcom,sa8775p-iris"; >> + >> + reg = <0 0x0aa00000 0 0xf0000>; >> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; >> + >> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, >> + <&videocc VIDEO_CC_MVS0_GDSC>, >> + <&rpmhpd SA8775P_MXC>, >> + <&rpmhpd SA8775P_MMCX>; >> + power-domain-names = "venus", >> + "vcodec0", >> + "mx", >> + "mmcx"; >> + operating-points-v2 = <&iris_opp_table>; >> + >> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, >> + <&videocc VIDEO_CC_MVS0C_CLK>, >> + <&videocc VIDEO_CC_MVS0_CLK>; >> + clock-names = "iface", >> + "core", >> + "vcodec0_core"; >> + >> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, >> + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS >> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; >> + interconnect-names = "cpu-cfg", >> + "video-mem"; >> + >> + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; >> + memory-region = <&pil_video_mem>; >> + >> + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; >> + reset-names = "bus"; >> + >> + iommus = <&apps_smmu 0x0880 0x0400>, >> + <&apps_smmu 0x0887 0x0400>; >> + dma-coherent; > > I think almost missed it: > > status = "disabled"; > > Don't enable the device by default, there is a chance of the firmware > being not present. On a sidenote, venus driver broke sync_state by requesting the firmware at load time, instead of at the time of first open (though the latter could introduce some latency on first video playback, but both are debatable) - what does iris do here? Konrad>
On 3/18/2025 5:52 PM, Konrad Dybcio wrote: > On 3/17/25 12:31 PM, Dmitry Baryshkov wrote: >> On Tue, Mar 11, 2025 at 05:33:55PM +0530, Vikash Garodia wrote: >>> Video node enables video on Qualcomm SA8775P platform. >>> >>> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ >>> 1 file changed, 67 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 >>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> @@ -10,6 +10,7 @@ >>> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> >>> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> >>> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> >>> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> >>> #include <dt-bindings/dma/qcom-gpi.h> >>> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> >>> #include <dt-bindings/mailbox/qcom-ipcc.h> >>> @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { >>> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >>> }; >>> >>> + iris: video-codec@aa00000 { >>> + compatible = "qcom,sa8775p-iris"; >>> + >>> + reg = <0 0x0aa00000 0 0xf0000>; >>> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; >>> + >>> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, >>> + <&videocc VIDEO_CC_MVS0_GDSC>, >>> + <&rpmhpd SA8775P_MXC>, >>> + <&rpmhpd SA8775P_MMCX>; >>> + power-domain-names = "venus", >>> + "vcodec0", >>> + "mx", >>> + "mmcx"; >>> + operating-points-v2 = <&iris_opp_table>; >>> + >>> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, >>> + <&videocc VIDEO_CC_MVS0C_CLK>, >>> + <&videocc VIDEO_CC_MVS0_CLK>; >>> + clock-names = "iface", >>> + "core", >>> + "vcodec0_core"; >>> + >>> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >>> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, >>> + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS >>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; >>> + interconnect-names = "cpu-cfg", >>> + "video-mem"; >>> + >>> + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; >>> + memory-region = <&pil_video_mem>; >>> + >>> + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; >>> + reset-names = "bus"; >>> + >>> + iommus = <&apps_smmu 0x0880 0x0400>, >>> + <&apps_smmu 0x0887 0x0400>; >>> + dma-coherent; >> >> I think almost missed it: >> >> status = "disabled"; >> >> Don't enable the device by default, there is a chance of the firmware >> being not present. > > On a sidenote, venus driver broke sync_state by requesting the firmware at > load time, instead of at the time of first open (though the latter could > introduce some latency on first video playback, but both are debatable) - > what does iris do here? iris does it on first open Regards, Vikash > > Konrad>
On 3/15/2025 7:13 PM, Konrad Dybcio wrote: > On 3/11/25 1:03 PM, Vikash Garodia wrote: >> Video node enables video on Qualcomm SA8775P platform. >> >> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ >> 1 file changed, 67 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 >> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> @@ -10,6 +10,7 @@ >> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> >> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> >> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> >> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> >> #include <dt-bindings/dma/qcom-gpi.h> >> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> >> #include <dt-bindings/mailbox/qcom-ipcc.h> >> @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { >> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >> }; >> >> + iris: video-codec@aa00000 { >> + compatible = "qcom,sa8775p-iris"; >> + >> + reg = <0 0x0aa00000 0 0xf0000>; >> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; >> + >> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, >> + <&videocc VIDEO_CC_MVS0_GDSC>, >> + <&rpmhpd SA8775P_MXC>, >> + <&rpmhpd SA8775P_MMCX>; >> + power-domain-names = "venus", >> + "vcodec0", >> + "mx", >> + "mmcx"; >> + operating-points-v2 = <&iris_opp_table>; >> + >> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, >> + <&videocc VIDEO_CC_MVS0C_CLK>, >> + <&videocc VIDEO_CC_MVS0_CLK>; >> + clock-names = "iface", >> + "core", >> + "vcodec0_core"; >> + >> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, > > This path should use QCOM_ICC_TAG_ACTIVE_ONLY on both endpoints What is the advantage of "ALWAYS" vs "ACTIVE_ONLY". Thinking of a possibility of APSS power collapsed, while video hardware is processing a frame ? Regards, Vikash > >> + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS >> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; >> + interconnect-names = "cpu-cfg", >> + "video-mem"; >> + >> + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; > > If it needs different firmware, I have my doubts over why 8550's data > would be fully reused. Are you sure everything in iris_platform_sm8550.c > applies? > >> + memory-region = <&pil_video_mem>; >> + >> + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; >> + reset-names = "bus"; >> + >> + iommus = <&apps_smmu 0x0880 0x0400>, >> + <&apps_smmu 0x0887 0x0400>; >> + dma-coherent; >> + >> + iris_opp_table: opp-table { >> + compatible = "operating-points-v2"; >> + >> + opp-366000000 { >> + opp-hz = /bits/ 64 <366000000>; >> + required-opps = <&rpmhpd_opp_svs_l1>, >> + <&rpmhpd_opp_svs_l1>; >> + }; > > Please add a newline between subsequent subnodes > > Konrad
On 3/18/25 3:24 PM, Vikash Garodia wrote: > > On 3/15/2025 7:13 PM, Konrad Dybcio wrote: >> On 3/11/25 1:03 PM, Vikash Garodia wrote: >>> Video node enables video on Qualcomm SA8775P platform. >>> >>> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ >>> 1 file changed, 67 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 >>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> @@ -10,6 +10,7 @@ >>> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> >>> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> >>> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> >>> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> >>> #include <dt-bindings/dma/qcom-gpi.h> >>> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> >>> #include <dt-bindings/mailbox/qcom-ipcc.h> >>> @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { >>> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >>> }; >>> >>> + iris: video-codec@aa00000 { >>> + compatible = "qcom,sa8775p-iris"; >>> + >>> + reg = <0 0x0aa00000 0 0xf0000>; >>> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; >>> + >>> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, >>> + <&videocc VIDEO_CC_MVS0_GDSC>, >>> + <&rpmhpd SA8775P_MXC>, >>> + <&rpmhpd SA8775P_MMCX>; >>> + power-domain-names = "venus", >>> + "vcodec0", >>> + "mx", >>> + "mmcx"; >>> + operating-points-v2 = <&iris_opp_table>; >>> + >>> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, >>> + <&videocc VIDEO_CC_MVS0C_CLK>, >>> + <&videocc VIDEO_CC_MVS0_CLK>; >>> + clock-names = "iface", >>> + "core", >>> + "vcodec0_core"; >>> + >>> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >>> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, >> >> This path should use QCOM_ICC_TAG_ACTIVE_ONLY on both endpoints > What is the advantage of "ALWAYS" vs "ACTIVE_ONLY". Thinking of a possibility of > APSS power collapsed, while video hardware is processing a frame ? That's totally okay, I'm requesting ACTIVE_ONLY just on the cpu-cfg path, which must not be used if APSS if offline anyway Konrad
On 3/18/2025 8:03 PM, Konrad Dybcio wrote: > On 3/18/25 3:24 PM, Vikash Garodia wrote: >> >> On 3/15/2025 7:13 PM, Konrad Dybcio wrote: >>> On 3/11/25 1:03 PM, Vikash Garodia wrote: >>>> Video node enables video on Qualcomm SA8775P platform. >>>> >>>> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >>>> --- >>>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ >>>> 1 file changed, 67 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>>> index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 >>>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>>> @@ -10,6 +10,7 @@ >>>> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> >>>> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> >>>> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> >>>> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> >>>> #include <dt-bindings/dma/qcom-gpi.h> >>>> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> >>>> #include <dt-bindings/mailbox/qcom-ipcc.h> >>>> @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { >>>> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >>>> }; >>>> >>>> + iris: video-codec@aa00000 { >>>> + compatible = "qcom,sa8775p-iris"; >>>> + >>>> + reg = <0 0x0aa00000 0 0xf0000>; >>>> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; >>>> + >>>> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, >>>> + <&videocc VIDEO_CC_MVS0_GDSC>, >>>> + <&rpmhpd SA8775P_MXC>, >>>> + <&rpmhpd SA8775P_MMCX>; >>>> + power-domain-names = "venus", >>>> + "vcodec0", >>>> + "mx", >>>> + "mmcx"; >>>> + operating-points-v2 = <&iris_opp_table>; >>>> + >>>> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, >>>> + <&videocc VIDEO_CC_MVS0C_CLK>, >>>> + <&videocc VIDEO_CC_MVS0_CLK>; >>>> + clock-names = "iface", >>>> + "core", >>>> + "vcodec0_core"; >>>> + >>>> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >>>> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, >>> >>> This path should use QCOM_ICC_TAG_ACTIVE_ONLY on both endpoints >> What is the advantage of "ALWAYS" vs "ACTIVE_ONLY". Thinking of a possibility of >> APSS power collapsed, while video hardware is processing a frame ? > > That's totally okay, I'm requesting ACTIVE_ONLY just on the cpu-cfg path, > which must not be used if APSS if offline anyway Agree on the CFG path. Will update in next version. > > Konrad
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -10,6 +10,7 @@ #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h> #include <dt-bindings/dma/qcom-gpi.h> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> #include <dt-bindings/mailbox/qcom-ipcc.h> @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 { interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; }; + iris: video-codec@aa00000 { + compatible = "qcom,sa8775p-iris"; + + reg = <0 0x0aa00000 0 0xf0000>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, + <&videocc VIDEO_CC_MVS0_GDSC>, + <&rpmhpd SA8775P_MXC>, + <&rpmhpd SA8775P_MMCX>; + power-domain-names = "venus", + "vcodec0", + "mx", + "mmcx"; + operating-points-v2 = <&iris_opp_table>; + + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>; + clock-names = "iface", + "core", + "vcodec0_core"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "cpu-cfg", + "video-mem"; + + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; + memory-region = <&pil_video_mem>; + + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; + reset-names = "bus"; + + iommus = <&apps_smmu 0x0880 0x0400>, + <&apps_smmu 0x0887 0x0400>; + dma-coherent; + + iris_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-366000000 { + opp-hz = /bits/ 64 <366000000>; + required-opps = <&rpmhpd_opp_svs_l1>, + <&rpmhpd_opp_svs_l1>; + }; + opp-444000000 { + opp-hz = /bits/ 64 <444000000>; + required-opps = <&rpmhpd_opp_nom>, + <&rpmhpd_opp_nom>; + }; + opp-533333334 { + opp-hz = /bits/ 64 <533333334>; + required-opps = <&rpmhpd_opp_turbo>, + <&rpmhpd_opp_turbo>; + }; + opp-560000000 { + opp-hz = /bits/ 64 <560000000>; + required-opps = <&rpmhpd_opp_turbo_l1>, + <&rpmhpd_opp_turbo_l1>; + }; + }; + }; + videocc: clock-controller@abf0000 { compatible = "qcom,sa8775p-videocc"; reg = <0x0 0x0abf0000 0x0 0x10000>;
Video node enables video on Qualcomm SA8775P platform. Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+)