| Message ID | 20250309-ecam_v4-v5-4-8eff4b59790d@oss.qualcomm.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: dwc: Add ECAM support with iATU configuration | expand |
On Sun, Mar 09, 2025 at 11:15:26AM +0530, Krishna Chaitanya Chundru wrote: > External Local Bus Interface(ELBI) registers are optional registers in > dwc which has vendor specific registers. s/dwc which has/DWC IPs having > > As these are part of dwc add the mapping support in dwc itself. > 'Since ELBI register space is applicable for all DWC based controllers, move the resource get code to DWC core and make it optional.' > Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++++ > drivers/pci/controller/dwc/pcie-designware.h | 1 + > 2 files changed, 10 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > index 145e7f579072..874fd31a6079 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -157,6 +157,15 @@ int dw_pcie_get_resources(struct dw_pcie *pci) > } > } > > + if (!pci->elbi_base) { > + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "elbi"); > + if (res) { > + pci->elbi_base = devm_ioremap_resource(pci->dev, res); > + if (IS_ERR(pci->elbi_base)) > + return PTR_ERR(pci->elbi_base); > + } > + } > + > /* LLDD is supposed to manually switch the clocks and resets state */ > if (dw_pcie_cap_is(pci, REQ_RES)) { > ret = dw_pcie_get_clocks(pci); > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > index 501d9ddfea16..3248318d3edd 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -443,6 +443,7 @@ struct dw_pcie { > resource_size_t dbi_phys_addr; > void __iomem *dbi_base2; > void __iomem *atu_base; > + void __iomem *elbi_base; > resource_size_t atu_phys_addr; > size_t atu_size; > u32 num_ib_windows; > > -- > 2.34.1 >
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 145e7f579072..874fd31a6079 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -157,6 +157,15 @@ int dw_pcie_get_resources(struct dw_pcie *pci) } } + if (!pci->elbi_base) { + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "elbi"); + if (res) { + pci->elbi_base = devm_ioremap_resource(pci->dev, res); + if (IS_ERR(pci->elbi_base)) + return PTR_ERR(pci->elbi_base); + } + } + /* LLDD is supposed to manually switch the clocks and resets state */ if (dw_pcie_cap_is(pci, REQ_RES)) { ret = dw_pcie_get_clocks(pci); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 501d9ddfea16..3248318d3edd 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -443,6 +443,7 @@ struct dw_pcie { resource_size_t dbi_phys_addr; void __iomem *dbi_base2; void __iomem *atu_base; + void __iomem *elbi_base; resource_size_t atu_phys_addr; size_t atu_size; u32 num_ib_windows;
External Local Bus Interface(ELBI) registers are optional registers in dwc which has vendor specific registers. As these are part of dwc add the mapping support in dwc itself. Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++++ drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 10 insertions(+)