[PULL,15/23] accel/tcg: Build tcg-accel-ops-rr.c once

Message ID	20250308225902.1208237-17-richard.henderson@linaro.org
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Series	[v2] linux-user/riscv: Fix handling of cpu mask in riscv_hwprobe syscall \| expand [v2] linux-user/riscv: Fix handling of cpu mask in riscv_hwprobe syscall [PULL,02/23] accel/tcg: Restrict CPU_TLB_DYN__BITS definitions to accel/tcg/ [PULL,03/23] include/exec: Move TARGET_PAGE_{SIZE, MASK, BITS} to target_page.h [PULL,04/23] include/exec: Split out exec/cpu-interrupt.h [PULL,05/23] accel/tcg: Compile watchpoint.c once [PULL,06/23] exec: Declare tlb_reset_dirty() in 'exec/cputlb.h' [PULL,07/23] exec: Declare tlb_set_page_full() in 'exec/cputlb.h' [PULL,08/23] exec: Declare tlb_set_page_with_attrs() in 'exec/cputlb.h' [PULL,09/23] exec: Declare tlb_set_page() in 'exec/cputlb.h' [PULL,10/23] exec: Declare tlb_hit() in 'exec/cputlb.h' [PULL,11/23] exec: Declare tlb_flush() in 'exec/cputlb.h' [PULL,12/23] system: Build watchpoint.c once [PULL,13/23] accel/tcg: Build tcg-accel-ops.c once [PULL,14/23] accel/tcg: Build tcg-accel-ops-icount.c once [PULL,15/23] accel/tcg: Build tcg-accel-ops-rr.c once [PULL,16/23] accel/tcg: Build tcg-accel-ops-mttcg.c once [PULL,17/23] accel/tcg: Restrict GETPC_ADJ to 'tb-internal.h' [PULL,18/23] accel/tcg: Split out getpc.h [PULL,19/23] qemu/atomic: Rename atomic128-cas.h headers using .h.inc suffix [PULL,20/23] qemu/atomic: Rename atomic128-ldst.h headers using .h.inc suffix [PULL,21/23] qemu/atomic128: Include missing 'qemu/atomic.h' header [PULL,22/23] accel/tcg: Build tcg-runtime.c once [PULL,23/23] accel/tcg: Build tcg-runtime-gvec.c once

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Subject: [PULL 15/23] accel/tcg: Build tcg-accel-ops-rr.c once
Date: Sat,  8 Mar 2025 14:58:54 -0800
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Series

[v2] linux-user/riscv: Fix handling of cpu mask in riscv_hwprobe syscall | expand

Commit Message

Richard Henderson March 8, 2025, 10:58 p.m. UTC

All that is required is to use cpu-common.h instead of exec-all.h.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/tcg-accel-ops-rr.c | 2 +-
 accel/tcg/meson.build        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c
index 028b385af9..f62cf24e1d 100644
--- a/accel/tcg/tcg-accel-ops-rr.c
+++ b/accel/tcg/tcg-accel-ops-rr.c
@@ -31,7 +31,7 @@ 
 #include "qemu/main-loop.h"
 #include "qemu/notify.h"
 #include "qemu/guest-random.h"
-#include "exec/exec-all.h"
+#include "exec/cpu-common.h"
 #include "tcg/startup.h"
 #include "tcg-accel-ops.h"
 #include "tcg-accel-ops-rr.h"
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 891b724eb6..87c1394b62 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -21,7 +21,6 @@  specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss)
 specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
   'cputlb.c',
   'tcg-accel-ops-mttcg.c',
-  'tcg-accel-ops-rr.c',
 ))
 
 system_ss.add(when: ['CONFIG_TCG'], if_true: files(
@@ -29,5 +28,6 @@  system_ss.add(when: ['CONFIG_TCG'], if_true: files(
   'monitor.c',
   'tcg-accel-ops.c',
   'tcg-accel-ops-icount.c',
+  'tcg-accel-ops-rr.c',
   'watchpoint.c',
 ))

[PULL,15/23] accel/tcg: Build tcg-accel-ops-rr.c once

Commit Message

Patch