Message ID | 20250129013857.135256-25-richard.henderson@linaro.org |
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State | New |
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[71.212.32.190]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21da3ea4200sm89341745ad.88.2025.01.28.17.39.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jan 2025 17:39:14 -0800 (PST) From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org Subject: [PATCH v2 24/34] target/arm: Use flags for AH negation in float*_ah_mulsub_f Date: Tue, 28 Jan 2025 17:38:47 -0800 Message-ID: <20250129013857.135256-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250129013857.135256-1-richard.henderson@linaro.org> References: <20250129013857.135256-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org |
Series |
target/arm: FEAT_AFP followups for FEAT_SME2
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diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c index 55bac9536f..5c1e84bf27 100644 --- a/target/arm/tcg/vec_helper.c +++ b/target/arm/tcg/vec_helper.c @@ -1563,22 +1563,19 @@ static float64 float64_mulsub_f(float64 dest, float64 op1, float64 op2, static float16 float16_ah_mulsub_f(float16 dest, float16 op1, float16 op2, float_status *stat) { - op1 = float16_is_any_nan(op1) ? op1 : float16_chs(op1); - return float16_muladd(op1, op2, dest, 0, stat); + return float16_muladd(op1, op2, dest, float_muladd_negate_product, stat); } static float32 float32_ah_mulsub_f(float32 dest, float32 op1, float32 op2, float_status *stat) { - op1 = float32_is_any_nan(op1) ? op1 : float32_chs(op1); - return float32_muladd(op1, op2, dest, 0, stat); + return float32_muladd(op1, op2, dest, float_muladd_negate_product, stat); } static float64 float64_ah_mulsub_f(float64 dest, float64 op1, float64 op2, float_status *stat) { - op1 = float64_is_any_nan(op1) ? op1 : float64_chs(op1); - return float64_muladd(op1, op2, dest, 0, stat); + return float64_muladd(op1, op2, dest, float_muladd_negate_product, stat); } #define DO_MULADD(NAME, FUNC, TYPE) \
The float_muladd_negate_product flag produces the same result as negating either of the multiplication operands, assuming neither of the operands are NaNs. But since FEAT_AFP does not negate NaNs, this behaviour is exactly what we need. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/tcg/vec_helper.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)