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[PULL] Please pull qcom/qcom-next

Message ID 20250122162407.1870390-1-caleb.connolly@linaro.org
State New
Headers show
Series [PULL] Please pull qcom/qcom-next | expand

Pull-request

git@source.denx.de:/u-boot/custodians/u-boot-snapdragon.git HEAD

Message

Caleb Connolly Jan. 22, 2025, 4:17 p.m. UTC
Hi Tom,

The highlights are:

* Fixed boot regression due to broken memory parsing
* Enable HW RNG and KASLR on all platforms
* Add support for Snapdragon X1 Elite hardware (clk/pinctrl)
* Add support for QCS9100 ride automotive development platform (clk/ufs)
* Add support for PCIe on SM8550, SM8650 and X1E
* Implement software debounce for PMIC buttons

Additionally, some minor improvements to "ufetch" have been pulled in:

* Show CPU architecture (arm/mips/etc)
* Make CONFIG_BLK optional
* Fix 32-bit support

The following changes since commit 82d262ae162d859d3b0bbcd40a9464e890b009da:

  Merge patch series "MediaTek MT7629 OF_UPSTREAM migration (v2)" (2025-01-21 09:29:05 -0600)

are available in the Git repository at:

  git@source.denx.de:/u-boot/custodians/u-boot-snapdragon.git HEAD

for you to fetch changes up to 599a1f9076d34c29d3683e0f833706478d62d9e0:

  MAINTAINERS: maintain qcs9100_defconfig (2025-01-22 17:14:24 +0100)

----------------------------------------------------------------
Caleb Connolly (2):
      button: qcom-pmic: add software debounce
      MAINTAINERS: maintain qcs9100_defconfig

J. Neuschäfer (3):
      cmd: ufetch: Fix type mismatch on 32-bit
      cmd: Allow building ufetch without CONFIG_BLK
      cmd: ufetch: Show CPU architecture under "CPU"

Neil Armstrong (17):
      clk: qcom: Add X1E80100 clock driver
      qcom_defconfig: enable X1E80100 clock driver
      pinctrl: qcom: Add X1E80100 pinctrl driver
      qcom_defconfig: enable X1E80100 pinctrl driver
      pinctrl: qcom: sm8550: add pcie1_clk_req_n function
      pinctrl: qcom: sm8650: add pcie[01]_clk_req_n function
      pinctrl: qcom: x1e80100: add pcie[3456ab]_clk functions
      regulator: qcom-rpmh-regulator: add support for pmc8380 regulators
      clk: qcom: add clk_phy_mux_enable() for PCIe PIPE clock
      clk: qcom: sm8550: add support for PCIe clocks
      clk: qcom: sm8650: add support for PCIe clocks
      clk: qcom: x1e80100: add support for PCIe clocks
      rng: msm: add support for newer Qualcomm hwrandom IPs
      configs: qcom_defconfig: enable RNG driver and command
      pci: pcie_dw_common: introduce pcie_dw_find_capability()
      pci: Add support for Qualcomm PCIe controller
      phy: qcom: add QMP PCIe PHY driver

Sam Day (1):
      mach-snapdragon: pass fdt to qcom_parse_memory

Tengfei Fan (1):
      arm64: dts: qcom: qcs9100: Add support for the QCS9100 Ride and Ride Rev3 boards

Varadarajan Narayanan (5):
      dts: qcs9100-ride-r3-u-boot: add override dtsi
      clk/qcom: add initial clock driver for qcs9100
      phy: qcom: Add SA8775 to QMP UFS PHY driver
      qcom_defconfig: enable SA8775P clock driver
      configs: add qcs9100_defconfig

 MAINTAINERS                                        |    1 +
 arch/arm/dts/qcs9100-ride-r3-u-boot.dtsi           |   20 +
 arch/arm/mach-snapdragon/board.c                   |   15 +-
 cmd/Kconfig                                        |    1 -
 cmd/ufetch.c                                       |   17 +-
 configs/qcom_defconfig                             |    6 +
 configs/qcs9100_defconfig                          |   18 +
 drivers/button/button-qcom-pmic.c                  |   14 +-
 drivers/clk/qcom/Kconfig                           |   16 +
 drivers/clk/qcom/Makefile                          |    2 +
 drivers/clk/qcom/clock-qcom.c                      |   19 +
 drivers/clk/qcom/clock-qcom.h                      |    2 +
 drivers/clk/qcom/clock-sa8775p.c                   |  142 +++
 drivers/clk/qcom/clock-sm8550.c                    |   36 +
 drivers/clk/qcom/clock-sm8650.c                    |   36 +
 drivers/clk/qcom/clock-x1e80100.c                  |  402 +++++++
 drivers/pci/Kconfig                                |    8 +
 drivers/pci/Makefile                               |    1 +
 drivers/pci/pcie_dw_common.c                       |   42 +
 drivers/pci/pcie_dw_common.h                       |    2 +
 drivers/pci/pcie_dw_qcom.c                         |  571 ++++++++++
 drivers/phy/qcom/Kconfig                           |    6 +
 drivers/phy/qcom/Makefile                          |    1 +
 drivers/phy/qcom/phy-qcom-qmp-pcie-qhp.h           |  123 +++
 drivers/phy/qcom/phy-qcom-qmp-pcie.c               | 1131 ++++++++++++++++++++
 drivers/phy/qcom/phy-qcom-qmp-pcs-misc-v3.h        |   17 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4.h        |   72 ++
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4_20.h     |   19 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5.h        |   17 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5_20.h     |   23 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6.h        |   17 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6_20.h     |   25 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v5.h             |   34 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v6.h             |   32 +
 drivers/phy/qcom/phy-qcom-qmp-pcs-v6_20.h          |   19 +
 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v5.h     |  124 +++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-ln-shrd-v6.h |   32 +
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v5.h    |  231 ++++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6.h    |   83 ++
 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6_20.h |   51 +
 drivers/phy/qcom/phy-qcom-qmp-ufs.c                |  171 +++
 drivers/pinctrl/qcom/Kconfig                       |    7 +
 drivers/pinctrl/qcom/Makefile                      |    1 +
 drivers/pinctrl/qcom/pinctrl-sm8550.c              |    1 +
 drivers/pinctrl/qcom/pinctrl-sm8650.c              |    2 +
 drivers/pinctrl/qcom/pinctrl-x1e80100.c            |  105 ++
 drivers/power/regulator/qcom-rpmh-regulator.c      |   19 +
 drivers/rng/msm_rng.c                              |   13 +-
 dts/upstream/src/arm64/qcom/qcs9100-ride-r3.dts    |   11 +
 dts/upstream/src/arm64/qcom/qcs9100-ride.dts       |   11 +
 include/pci.h                                      |    4 +
 51 files changed, 3756 insertions(+), 17 deletions(-)
 create mode 100644 arch/arm/dts/qcs9100-ride-r3-u-boot.dtsi
 create mode 100644 configs/qcs9100_defconfig
 create mode 100644 drivers/clk/qcom/clock-sa8775p.c
 create mode 100644 drivers/clk/qcom/clock-x1e80100.c
 create mode 100644 drivers/pci/pcie_dw_qcom.c
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcie-qhp.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcie.c
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-misc-v3.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4_20.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5_20.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6_20.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-v5.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-v6.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-v6_20.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v5.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-ln-shrd-v6.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v5.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6.h
 create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6_20.h
 create mode 100644 drivers/pinctrl/qcom/pinctrl-x1e80100.c
 create mode 100644 dts/upstream/src/arm64/qcom/qcs9100-ride-r3.dts
 create mode 100644 dts/upstream/src/arm64/qcom/qcs9100-ride.dts

Comments

Tom Rini Jan. 22, 2025, 9:57 p.m. UTC | #1
On Wed, Jan 22, 2025 at 05:17:45PM +0100, Caleb Connolly wrote:

> Hi Tom,
> 
> The highlights are:
> 
> * Fixed boot regression due to broken memory parsing
> * Enable HW RNG and KASLR on all platforms
> * Add support for Snapdragon X1 Elite hardware (clk/pinctrl)
> * Add support for QCS9100 ride automotive development platform (clk/ufs)
> * Add support for PCIe on SM8550, SM8650 and X1E
> * Implement software debounce for PMIC buttons
> 
> Additionally, some minor improvements to "ufetch" have been pulled in:
> 
> * Show CPU architecture (arm/mips/etc)
> * Make CONFIG_BLK optional
> * Fix 32-bit support
> 
> The following changes since commit 82d262ae162d859d3b0bbcd40a9464e890b009da:
> 
>   Merge patch series "MediaTek MT7629 OF_UPSTREAM migration (v2)" (2025-01-21 09:29:05 -0600)
> 
> are available in the Git repository at:
> 
>   git@source.denx.de:/u-boot/custodians/u-boot-snapdragon.git HEAD
> 
> for you to fetch changes up to 599a1f9076d34c29d3683e0f833706478d62d9e0:
> 
>   MAINTAINERS: maintain qcs9100_defconfig (2025-01-22 17:14:24 +0100)
> 

Applied to u-boot/master, thanks!