diff mbox series

[03/23] hw/mips/boston: Replace bl_gen_write_ulong() -> bl_gen_write_u64()

Message ID 20250113004748.41658-4-philmd@linaro.org
State New
Headers show
Series hw/mips: Remove all uses of &first_cpu | expand

Commit Message

Philippe Mathieu-Daudé Jan. 13, 2025, 12:47 a.m. UTC 
"exec/hwaddr.h" defines:

  typedef uint64_t hwaddr;

  typedef struct MemMapEntry {
      hwaddr base;
      hwaddr size;
  } MemMapEntry;

Since MemMapEntry::base is always of type uint64_t,
we can directly use bl_gen_write_u64().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/mips/boston.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 67044af962a..63dc654192a 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -329,20 +329,20 @@  static void gen_firmware(void *p, hwaddr kernel_entry, hwaddr fdt_addr)
 
     /* Move CM GCRs */
     regaddr = cpu_mips_phys_to_kseg1(NULL, GCR_BASE_ADDR + GCR_BASE_OFS),
-    bl_gen_write_ulong(&p, regaddr,
-                       boston_memmap[BOSTON_CM].base);
+    bl_gen_write_u64(&p, regaddr,
+                     boston_memmap[BOSTON_CM].base);
 
     /* Move & enable GIC GCRs */
     regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base
                                            + GCR_GIC_BASE_OFS),
-    bl_gen_write_ulong(&p, regaddr,
-                       boston_memmap[BOSTON_GIC].base | GCR_GIC_BASE_GICEN_MSK);
+    bl_gen_write_u64(&p, regaddr,
+                     boston_memmap[BOSTON_GIC].base | GCR_GIC_BASE_GICEN_MSK);
 
     /* Move & enable CPC GCRs */
     regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base
                                            + GCR_CPC_BASE_OFS),
-    bl_gen_write_ulong(&p, regaddr,
-                       boston_memmap[BOSTON_CPC].base | GCR_CPC_BASE_CPCEN_MSK);
+    bl_gen_write_u64(&p, regaddr,
+                     boston_memmap[BOSTON_CPC].base | GCR_CPC_BASE_CPCEN_MSK);
 
     /*
      * Setup argument registers to follow the UHI boot protocol: