diff mbox series

[V1,4/6] spi: tegra210-quad: remove redundant error handling code

Message ID 20250103060407.1064107-5-va@nvidia.com
State New
Headers show
Series Configure Clocks, Add Native Dma support. | expand

Commit Message

Vishwaroop A Jan. 3, 2025, 6:04 a.m. UTC 
Remove unnecessary error handling code that terminated transfers and
executed delay on errors. This code was redundant as error handling is
already done at a higher level in the SPI core.

Fixes: 1b8342cc4a38 ("spi: tegra210-quad: combined sequence mode")

Change-Id: I9e77732db64d7a1674b7e87048c7b59d8dbab645
Signed-off-by: Vishwaroop A <va@nvidia.com>
---
 drivers/spi/spi-tegra210-quad.c | 4 ----
 1 file changed, 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c
index 43d6587fad09..2d7a2e3da337 100644
--- a/drivers/spi/spi-tegra210-quad.c
+++ b/drivers/spi/spi-tegra210-quad.c
@@ -1187,10 +1187,6 @@  static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi,
 
 exit:
 	msg->status = ret;
-	if (ret < 0) {
-		tegra_qspi_transfer_end(spi);
-		spi_transfer_delay_exec(xfer);
-	}
 
 	return ret;
 }