diff mbox series

[59/73] tcg: Remove TCG_OPF_64BIT

Message ID 20250102180654.1420056-60-richard.henderson@linaro.org
State New
Headers show
Series tcg: Merge *_i32 and *_i64 opcodes | expand

Commit Message

Richard Henderson Jan. 2, 2025, 6:06 p.m. UTC 
We now get this information from the stored TCGOp.type.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/tcg/tcg-opc.h | 114 +++++++++++++++++++++---------------------
 include/tcg/tcg.h     |   2 -
 2 files changed, 57 insertions(+), 59 deletions(-)
diff mbox series

Patch

diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h
index 706d2a9794..561ddbc016 100644
--- a/include/tcg/tcg-opc.h
+++ b/include/tcg/tcg-opc.h
@@ -92,64 +92,64 @@  DEF(clz_i32, 1, 2, 0, 0)
 DEF(ctz_i32, 1, 2, 0, 0)
 DEF(ctpop_i32, 1, 1, 0, 0)
 
-DEF(mov_i64, 1, 1, 0, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT)
-DEF(setcond_i64, 1, 2, 1, TCG_OPF_64BIT)
-DEF(negsetcond_i64, 1, 2, 1, TCG_OPF_64BIT)
-DEF(movcond_i64, 1, 4, 1, TCG_OPF_64BIT)
+DEF(mov_i64, 1, 1, 0, TCG_OPF_NOT_PRESENT)
+DEF(setcond_i64, 1, 2, 1, 0)
+DEF(negsetcond_i64, 1, 2, 1, 0)
+DEF(movcond_i64, 1, 4, 1, 0)
 /* load/store */
-DEF(ld_i64, 1, 1, 2, TCG_OPF_64BIT)
-DEF(st_i64, 0, 2, 2, TCG_OPF_64BIT)
+DEF(ld_i64, 1, 1, 2, 0)
+DEF(st_i64, 0, 2, 2, 0)
 /* arith */
-DEF(add_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(sub_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(mul_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(div_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(divu_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(rem_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(remu_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(div2_i64, 2, 3, 0, TCG_OPF_64BIT)
-DEF(divu2_i64, 2, 3, 0, TCG_OPF_64BIT)
-DEF(and_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(or_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(xor_i64, 1, 2, 0, TCG_OPF_64BIT)
+DEF(add_i64, 1, 2, 0, 0)
+DEF(sub_i64, 1, 2, 0, 0)
+DEF(mul_i64, 1, 2, 0, 0)
+DEF(div_i64, 1, 2, 0, 0)
+DEF(divu_i64, 1, 2, 0, 0)
+DEF(rem_i64, 1, 2, 0, 0)
+DEF(remu_i64, 1, 2, 0, 0)
+DEF(div2_i64, 2, 3, 0, 0)
+DEF(divu2_i64, 2, 3, 0, 0)
+DEF(and_i64, 1, 2, 0, 0)
+DEF(or_i64, 1, 2, 0, 0)
+DEF(xor_i64, 1, 2, 0, 0)
 /* shifts/rotates */
-DEF(shl_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(shr_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(sar_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(rotl_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(rotr_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(deposit_i64, 1, 2, 2, TCG_OPF_64BIT)
-DEF(extract_i64, 1, 1, 2, TCG_OPF_64BIT)
-DEF(sextract_i64, 1, 1, 2, TCG_OPF_64BIT)
-DEF(extract2_i64, 1, 2, 1, TCG_OPF_64BIT)
+DEF(shl_i64, 1, 2, 0, 0)
+DEF(shr_i64, 1, 2, 0, 0)
+DEF(sar_i64, 1, 2, 0, 0)
+DEF(rotl_i64, 1, 2, 0, 0)
+DEF(rotr_i64, 1, 2, 0, 0)
+DEF(deposit_i64, 1, 2, 2, 0)
+DEF(extract_i64, 1, 1, 2, 0)
+DEF(sextract_i64, 1, 1, 2, 0)
+DEF(extract2_i64, 1, 2, 1, 0)
 
 /* size changing ops */
-DEF(ext_i32_i64, 1, 1, 0, TCG_OPF_64BIT)
-DEF(extu_i32_i64, 1, 1, 0, TCG_OPF_64BIT)
+DEF(ext_i32_i64, 1, 1, 0, 0)
+DEF(extu_i32_i64, 1, 1, 0, 0)
 DEF(extrl_i64_i32, 1, 1, 0, 0)
 DEF(extrh_i64_i32, 1, 1, 0, 0)
 
-DEF(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH | TCG_OPF_64BIT)
-DEF(bswap16_i64, 1, 1, 1, TCG_OPF_64BIT)
-DEF(bswap32_i64, 1, 1, 1, TCG_OPF_64BIT)
-DEF(bswap64_i64, 1, 1, 1, TCG_OPF_64BIT)
-DEF(not_i64, 1, 1, 0, TCG_OPF_64BIT)
-DEF(neg_i64, 1, 1, 0, TCG_OPF_64BIT)
-DEF(andc_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(orc_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(eqv_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(nand_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(nor_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(clz_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(ctz_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(ctpop_i64, 1, 1, 0, TCG_OPF_64BIT)
+DEF(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH)
+DEF(bswap16_i64, 1, 1, 1, 0)
+DEF(bswap32_i64, 1, 1, 1, 0)
+DEF(bswap64_i64, 1, 1, 1, 0)
+DEF(not_i64, 1, 1, 0, 0)
+DEF(neg_i64, 1, 1, 0, 0)
+DEF(andc_i64, 1, 2, 0, 0)
+DEF(orc_i64, 1, 2, 0, 0)
+DEF(eqv_i64, 1, 2, 0, 0)
+DEF(nand_i64, 1, 2, 0, 0)
+DEF(nor_i64, 1, 2, 0, 0)
+DEF(clz_i64, 1, 2, 0, 0)
+DEF(ctz_i64, 1, 2, 0, 0)
+DEF(ctpop_i64, 1, 1, 0, 0)
 
-DEF(add2_i64, 2, 4, 0, TCG_OPF_64BIT)
-DEF(sub2_i64, 2, 4, 0, TCG_OPF_64BIT)
-DEF(mulu2_i64, 2, 2, 0, TCG_OPF_64BIT)
-DEF(muls2_i64, 2, 2, 0, TCG_OPF_64BIT)
-DEF(muluh_i64, 1, 2, 0, TCG_OPF_64BIT)
-DEF(mulsh_i64, 1, 2, 0, TCG_OPF_64BIT)
+DEF(add2_i64, 2, 4, 0, 0)
+DEF(sub2_i64, 2, 4, 0, 0)
+DEF(mulu2_i64, 2, 2, 0, 0)
+DEF(muls2_i64, 2, 2, 0, 0)
+DEF(muluh_i64, 1, 2, 0, 0)
+DEF(mulsh_i64, 1, 2, 0, 0)
 
 #define DATA64_ARGS  (TCG_TARGET_REG_BITS == 64 ? 1 : 2)
 
@@ -169,28 +169,28 @@  DEF(qemu_ld_a32_i32, 1, 1, 1,
 DEF(qemu_st_a32_i32, 0, 1 + 1, 1,
     TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 DEF(qemu_ld_a32_i64, DATA64_ARGS, 1, 1,
-    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT)
+    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 DEF(qemu_st_a32_i64, 0, DATA64_ARGS + 1, 1,
-    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT)
+    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 
 DEF(qemu_ld_a64_i32, 1, DATA64_ARGS, 1,
     TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 DEF(qemu_st_a64_i32, 0, 1 + DATA64_ARGS, 1,
     TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 DEF(qemu_ld_a64_i64, DATA64_ARGS, DATA64_ARGS, 1,
-    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT)
+    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 DEF(qemu_st_a64_i64, 0, DATA64_ARGS + DATA64_ARGS, 1,
-    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT)
+    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 
 /* Only for 64-bit hosts at the moment. */
 DEF(qemu_ld_a32_i128, 2, 1, 1,
-    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT)
+    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 DEF(qemu_ld_a64_i128, 2, 1, 1,
-    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT)
+    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 DEF(qemu_st_a32_i128, 0, 3, 1,
-    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT)
+    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 DEF(qemu_st_a64_i128, 0, 3, 1,
-    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT)
+    TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
 
 /* Host vector support.  */
 
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index b5ef89a6a9..90e5e4dfb8 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -695,8 +695,6 @@  enum {
     /* Instruction has side effects: it cannot be removed if its outputs
        are not used, and might trigger exceptions.  */
     TCG_OPF_SIDE_EFFECTS = 0x08,
-    /* Instruction operands are 64-bits (otherwise 32-bits).  */
-    TCG_OPF_64BIT        = 0x10,
     /* Instruction is optional and not implemented by the host, or insn
        is generic and should not be implemented by the host.  */
     TCG_OPF_NOT_PRESENT  = 0x20,