| Message ID | 20241213134950.234946-5-quic_mmanikan@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add PCIe support for IPQ5424 | expand |
On 12/13/2024 8:37 PM, Konrad Dybcio wrote: > On 13.12.2024 2:49 PM, Manikanta Mylavarapu wrote: >> Enable the PCIe controller and PHY nodes corresponding to RDP466. >> >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >> --- > > >> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 43 +++++++++++++++++++++ >> 1 file changed, 43 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> index d4d31026a026..8857b64df1be 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> @@ -45,6 +45,26 @@ data-pins { >> bias-pull-up; >> }; >> }; >> + >> + pcie2_default_state: pcie2-default-state { >> + perst-n-pins { >> + pins = "gpio31"; >> + function = "gpio"; >> + drive-strength = <8>; >> + bias-pull-up; >> + output-low; >> + }; >> + }; > > Drop the inner wrapper, in both definitions /\ \/ > > Konrad > Okay, sure. Thanks & Regards, Manikanta.
On Fri, Dec 13, 2024 at 07:19:50PM +0530, Manikanta Mylavarapu wrote: [ . . . ] > +&pcie2_phy { > + status = "okay"; > +}; > + > +&pcie2 { > + pinctrl-0 = <&pcie2_default_state>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; pcie2 should come before pcie2_phy > + > +&pcie3_phy { > + status = "okay"; > +}; > + > +&pcie3 { > + pinctrl-0 = <&pcie3_default_state>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; same here. -Varada
On 1/3/2025 12:22 PM, Varadarajan Narayanan wrote: > On Fri, Dec 13, 2024 at 07:19:50PM +0530, Manikanta Mylavarapu wrote: > > [ . . . ] > >> +&pcie2_phy { >> + status = "okay"; >> +}; >> + >> +&pcie2 { >> + pinctrl-0 = <&pcie2_default_state>; >> + pinctrl-names = "default"; >> + >> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; >> + status = "okay"; >> +}; > > pcie2 should come before pcie2_phy > Okay, i will update in the next version. >> + >> +&pcie3_phy { >> + status = "okay"; >> +}; >> + >> +&pcie3 { >> + pinctrl-0 = <&pcie3_default_state>; >> + pinctrl-names = "default"; >> + >> + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; >> + status = "okay"; >> +}; > > same here. Okay, i will update in the next version. Thanks & Regards, Manikanta.
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts index d4d31026a026..8857b64df1be 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts @@ -45,6 +45,26 @@ data-pins { bias-pull-up; }; }; + + pcie2_default_state: pcie2-default-state { + perst-n-pins { + pins = "gpio31"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + output-low; + }; + }; + + pcie3_default_state: pcie3-default-state { + perst-n-pins { + pins = "gpio34"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + output-low; + }; + }; }; &uart1 { @@ -57,3 +77,26 @@ &xo_board { clock-frequency = <24000000>; }; +&pcie2_phy { + status = "okay"; +}; + +&pcie2 { + pinctrl-0 = <&pcie2_default_state>; + pinctrl-names = "default"; + + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&pcie3_phy { + status = "okay"; +}; + +&pcie3 { + pinctrl-0 = <&pcie3_default_state>; + pinctrl-names = "default"; + + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; + status = "okay"; +};
Enable the PCIe controller and PHY nodes corresponding to RDP466. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 43 +++++++++++++++++++++ 1 file changed, 43 insertions(+)